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Merge tag 'amlogic-arm64-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Browse Source 
Amlogic ARM64 DT Changes for v6.19:
- Fix the PCIe DBI memory region name
- Add ISP nodes for Amlogic C3
- Add power controller nodes for Amlogic S6/S7/S7D
- Add Pinctrl node for Amlogic A4
- Add AO Secure node for Amlogic S6/S7/S7D
- Add GPIO Interrupt node for Amlogic S6/S7/S7D
- Fix S922X cache layout
- New Boards:
  - Tanix TX9 Pro

* tag 'amlogic-arm64-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs
  arm64: dts: Add gpio_intc node for Amlogic S7D SoCs
  arm64: dts: Add gpio_intc node for Amlogic S7 SoCs
  arm64: dts: Add gpio_intc node for Amlogic S6 SoCs
  arm64: dts: amlogic: s7d: add ao secure node
  arm64: dts: amlogic: s7: add ao secure node
  arm64: dts: amlogic: s6: add ao secure node
  arm64: dts: amlogic: Fix the register name of the 'DBI' region
  dts: arm64: amlogic: add a5 pinctrl node
  arm64: dts: amlogic: s7d: add power domain controller node
  arm64: dts: amlogic: s7: add power domain controller node
  arm64: dts: amlogic: s6: add power domain controller node
  dts: arm64: amlogic: Add ISP related nodes for C3
  arm64: dts: meson: add initial device-tree for Tanix TX9 Pro
  dt-bindings: arm: amlogic: add support for Tanix TX9 Pro

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-11-27 22:46:41 +01:00
parent feae664d3a a7ab6f9466
commit 6038f30aa8
12 changed files with 443 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/amlogic.yaml
View File

@@ -134,6 +134,7 @@ properties:
- libretech,aml-s912-pc
- minix,neo-u9h
- nexbox,a1
- oranth,tx9-pro
- tronsmart,vega-s96
- ugoos,am3
- videostrong,gxm-kiii-pro

1
arch/arm64/boot/dts/amlogic/Makefile
View File

@@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-tx9-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-ugoos-am3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb

90
arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
View File

@@ -5,6 +5,7 @@
#include "amlogic-a4-common.dtsi"
#include "amlogic-a5-reset.h"
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,a5-pwrc.h>
/ {
cpus {
@@ -58,6 +59,95 @@
#reset-cells = <1>;
};
periphs_pinctrl: pinctrl@4000 {
compatible = "amlogic,pinctrl-a5",
"amlogic,pinctrl-a4";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x4000 0x0 0x300>;
gpioz: gpio@c0 {
reg = <0x0 0xc0 0x0 0x40>,
<0x0 0x18 0x0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
};
gpiox: gpio@100 {
reg = <0x0 0x100 0x0 0x40>,
<0x0 0xc 0x0 0xc>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
};
gpiot: gpio@140 {
reg = <0x0 0x140 0x0 0x40>,
<0x0 0x2c 0x0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 14>;
};
gpiod: gpio@180 {
reg = <0x0 0x180 0x0 0x40>,
<0x0 0x40 0x0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>;
};
gpioe: gpio@1c0 {
reg = <0x0 0x1c0 0x0 0x40>,
<0x0 0x48 0x0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
};
gpioc: gpio@200 {
reg = <0x0 0x200 0x0 0x40>,
<0x0 0x24 0x0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 11>;
};
gpiob: gpio@240 {
reg = <0x0 0x240 0x0 0x40>,
<0x0 0x0 0x0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
};
gpioh: gpio@280 {
reg = <0x0 0x280 0x0 0x40>,
<0x0 0x4c 0x0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 5>;
};
gpio_test_n: gpio@2c0 {
reg = <0x0 0x2c0 0x0 0x40>,
<0x0 0x3c 0x0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
};
};
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,a5-gpio-intc",
"amlogic,meson-gpio-intc";

84
arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts
View File

@@ -17,6 +17,7 @@
aliases {
serial0 = &uart_b;
spi0 = &spifc;
i2c2 = &i2c2;
};
memory@0 {
@@ -146,6 +147,36 @@
regulator-boot-on;
regulator-always-on;
};
camera_vdddo_1v8: regulator-camera-1v8 {
compatible = "regulator-fixed";
regulator-name = "CAMERA_VDDDO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
camera_vdda_2v9: regulator-camera-2v9 {
compatible = "regulator-fixed";
regulator-name = "CAMERA_VDDA";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
vin-supply = <&vcc_5v>;
regulator-boot-on;
regulator-always-on;
};
camera_vddd_1v2: regulator-camera-1v2 {
compatible = "regulator-fixed";
regulator-name = "CAMERA_VDDD";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcc_3v3>;
regulator-boot-on;
regulator-always-on;
};
};
&uart_b {
@@ -258,3 +289,56 @@
vmmc-supply = <&sdcard>;
vqmmc-supply = <&sdcard>;
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins1>;
clock-frequency = <100000>; /* default 100k */
imx290: sensor0@1a {
compatible = "sony,imx290";
reg = <0x1a>;
clocks = <&clkc_pll CLKID_MCLK0>;
clock-names = "xclk";
clock-frequency = <37125000>;
assigned-clocks = <&clkc_pll CLKID_MCLK_PLL>,
<&clkc_pll CLKID_MCLK0>;
assigned-clock-rates = <74250000>, <37125000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v9>;
vddd-supply = <&camera_vddd_1v2>;
reset-gpios = <&gpio GPIOE_4 GPIO_ACTIVE_LOW>;
port {
imx290_out: endpoint {
data-lanes = <1 2 3 4>;
link-frequencies = /bits/ 64 <222750000 148500000>;
remote-endpoint = <&c3_mipi_csi_in>;
};
};
};
};
&csi2 {
status = "okay";
ports {
port@0 {
c3_mipi_csi_in: endpoint {
remote-endpoint = <&imx290_out>;
data-lanes = <1 2 3 4>;
};
};
};
};
&adap {
status = "okay";
};
&isp {
status = "okay";
};

88
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
View File

@@ -1031,5 +1031,93 @@
#size-cells = <0>;
};
};
csi2: csi2@ff018000 {
compatible = "amlogic,c3-mipi-csi2";
reg = <0x0 0xff018000 0x0 0x100>,
<0x0 0xff019000 0x0 0x300>,
<0x0 0xff01a000 0x0 0x100>;
reg-names = "aphy", "dphy", "host";
power-domains = <&pwrc PWRC_C3_MIPI_ISP_WRAP_ID>;
clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_CSI_PHY0>;
clock-names = "vapb", "phy0";
assigned-clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_CSI_PHY0>;
assigned-clock-rates = <0>, <200000000>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
c3_mipi_csi_out: endpoint {
remote-endpoint = <&c3_adap_in>;
};
};
};
};
adap: adap@ff010000 {
compatible = "amlogic,c3-mipi-adapter";
reg = <0x0 0xff010000 0x0 0x100>,
<0x0 0xff01b000 0x0 0x100>,
<0x0 0xff01d000 0x0 0x200>;
reg-names = "top", "fd", "rd";
power-domains = <&pwrc PWRC_C3_ISP_TOP_ID>;
clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_ISP0>;
clock-names = "vapb", "isp0";
assigned-clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_ISP0>;
assigned-clock-rates = <0>, <400000000>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
c3_adap_in: endpoint {
remote-endpoint = <&c3_mipi_csi_out>;
};
};
port@1 {
reg = <1>;
c3_adap_out: endpoint {
remote-endpoint = <&c3_isp_in>;
};
};
};
};
isp: isp@ff000000 {
compatible = "amlogic,c3-isp";
reg = <0x0 0xff000000 0x0 0xf000>;
reg-names = "isp";
power-domains = <&pwrc PWRC_C3_ISP_TOP_ID>;
clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_ISP0>;
clock-names = "vapb", "isp0";
assigned-clocks = <&clkc_periphs CLKID_VAPB>,
<&clkc_periphs CLKID_ISP0>;
assigned-clock-rates = <0>, <400000000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
port {
c3_isp_in: endpoint {
remote-endpoint = <&c3_adap_out>;
};
};
};
};
};

28
arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
View File

@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,s6-pwrc.h>
/ {
cpus {
#address-cells = <2>;
@@ -41,6 +42,15 @@
};
};
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,s6-pwrc";
#power-domain-cells = <1>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -189,6 +199,24 @@
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,s6-gpio-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x4080 0x0 0x20>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
ao-secure@10220 {
compatible = "amlogic,s6-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};
};

28
arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
View File

@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,s7-pwrc.h>
/ {
cpus {
@@ -79,6 +80,15 @@
};
};
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,s7-pwrc";
#power-domain-cells = <1>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -211,6 +221,24 @@
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,s7-gpio-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x4080 0x0 0x20>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
ao-secure@10220 {
compatible = "amlogic,s7-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};
};

28
arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi
View File

@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,s7d-pwrc.h>
/ {
cpus {
@@ -43,6 +44,15 @@
};
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,s7d-pwrc";
#power-domain-cells = <1>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -184,6 +194,24 @@
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,s7d-gpio-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x4080 0x0 0x20>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
ao-secure@10220 {
compatible = "amlogic,s7d-ao-secure",
"amlogic,meson-gx-ao-secure",
"syscon";
reg = <0x0 0x10220 0x0 0x140>;
amlogic,has-chip-id;
};
};
};
};

4
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
View File

@@ -208,7 +208,7 @@
reg = <0x0 0xf9800000 0x0 0x400000>,
<0x0 0xff646000 0x0 0x2000>,
<0x0 0xf9f00000 0x0 0x100000>;
reg-names = "elbi", "cfg", "config";
reg-names = "dbi", "cfg", "config";
interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
@@ -234,7 +234,7 @@
reg = <0x0 0xfa000000 0x0 0x400000>,
<0x0 0xff648000 0x0 0x2000>,
<0x0 0xfa400000 0x0 0x100000>;
reg-names = "elbi", "cfg", "config";
reg-names = "dbi", "cfg", "config";
interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;

2
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@@ -138,7 +138,7 @@
reg = <0x0 0xfc000000 0x0 0x400000>,
<0x0 0xff648000 0x0 0x2000>,
<0x0 0xfc400000 0x0 0x200000>;
reg-names = "elbi", "cfg", "config";
reg-names = "dbi", "cfg", "config";
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;

4
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
View File

@@ -87,7 +87,7 @@
i-cache-line-size = <32>;
i-cache-size = <0x8000>;
i-cache-sets = <32>;
next-level-cache = <&l2_cache_l>;
next-level-cache = <&l2_cache_b>;
#cooling-cells = <2>;
};
@@ -103,7 +103,7 @@
i-cache-line-size = <32>;
i-cache-size = <0x8000>;
i-cache-sets = <32>;
next-level-cache = <&l2_cache_l>;
next-level-cache = <&l2_cache_b>;
#cooling-cells = <2>;
};

90
arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts Normal file
View File

@@ -0,0 +1,90 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*/
/dts-v1/;
#include "meson-gxm.dtsi"
#include "meson-gx-p23x-q20x.dtsi"
#include <dt-bindings/input/input.h>
/ {
compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
model = "Tanix TX9 Pro";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1710000>;
button-function {
label = "Update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <10000>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
};
&ethmac {
pinctrl-0 = <&eth_pins>;
pinctrl-names = "default";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
phy-mode = "rgmii";
};
&external_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&ir {
linux,rc-map-name = "rc-tanix-tx3mini";
};
&sd_emmc_a {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};