drm/i915/de: Have intel_de_wait() hand out the final register value

We currently have a bunch of places that want the final register
value after register polling. Currently those places are mostly
using intel_de_wait_custom(). That is not a function that we
want to keep around as it pretty much prevents conversion to
poll_timeout_us().

Have intel_de_wait() also return the final register value so
that some of the current users can be converted over to the
simpler interface.

Done with cocci:
@@
@@
int intel_de_wait(...
+ ,u32 *out_value
 )
{
...
__intel_wait_for_register(...,
- NULL
+ out_value
 )
...
}

@@
@@
 intel_de_wait(...
+ ,NULL
 )

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251110172756.2132-3-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2025-11-10 19:27:41 +02:00
parent d294e4ab22
commit 462c1104db
4 changed files with 8 additions and 8 deletions

View File

@@ -116,14 +116,14 @@ __intel_de_wait_for_register_atomic_nowl(struct intel_display *display,
static inline int
intel_de_wait(struct intel_display *display, i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout_ms)
u32 mask, u32 value, unsigned int timeout_ms, u32 *out_value)
{
int ret;
intel_dmc_wl_get(display, reg);
ret = __intel_wait_for_register(__to_uncore(display), reg, mask,
value, 2, timeout_ms, NULL);
value, 2, timeout_ms, out_value);
intel_dmc_wl_put(display, reg);
@@ -169,14 +169,14 @@ static inline int
intel_de_wait_for_set(struct intel_display *display, i915_reg_t reg,
u32 mask, unsigned int timeout_ms)
{
return intel_de_wait(display, reg, mask, mask, timeout_ms);
return intel_de_wait(display, reg, mask, mask, timeout_ms, NULL);
}
static inline int
intel_de_wait_for_clear(struct intel_display *display, i915_reg_t reg,
u32 mask, unsigned int timeout_ms)
{
return intel_de_wait(display, reg, mask, 0, timeout_ms);
return intel_de_wait(display, reg, mask, 0, timeout_ms, NULL);
}
/*

View File

@@ -1446,7 +1446,7 @@ static void assert_chv_phy_status(struct intel_display *display)
* so the power state can take a while to actually change.
*/
if (intel_de_wait(display, DISPLAY_PHY_STATUS,
phy_status_mask, phy_status, 10))
phy_status_mask, phy_status, 10, NULL))
drm_err(display->drm,
"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",
intel_de_read(display, DISPLAY_PHY_STATUS) & phy_status_mask,

View File

@@ -784,7 +784,7 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector,
/* Wait for encryption confirmation */
if (intel_de_wait(display, HDCP_STATUS(display, cpu_transcoder, port),
stream_enc_status, enable ? stream_enc_status : 0,
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS, NULL)) {
drm_err(display->drm, "Timed out waiting for transcoder: %s stream encryption %s\n",
transcoder_name(cpu_transcoder), str_enabled_disabled(enable));
return -ETIMEDOUT;
@@ -824,7 +824,7 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
if (intel_de_wait(display, HDCP2_STREAM_STATUS(display, cpu_transcoder, pipe),
STREAM_ENCRYPTION_STATUS,
enable ? STREAM_ENCRYPTION_STATUS : 0,
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS, NULL)) {
drm_err(display->drm, "Timed out waiting for transcoder: %s stream encryption %s\n",
transcoder_name(cpu_transcoder), str_enabled_disabled(enable));
return -ETIMEDOUT;

View File

@@ -1193,7 +1193,7 @@ void vlv_wait_port_ready(struct intel_encoder *encoder,
break;
}
if (intel_de_wait(display, dpll_reg, port_mask, expected_mask, 1000))
if (intel_de_wait(display, dpll_reg, port_mask, expected_mask, 1000, NULL))
drm_WARN(display->drm, 1,
"timed out waiting for [ENCODER:%d:%s] port ready: got 0x%x, expected 0x%x\n",
encoder->base.base.id, encoder->base.name,