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drm/i915/de: Implement register waits one way

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Currently we use a messy mix of intel_wait_for_register*()
and __intel_wait_for_register*() to implement various
register polling functions. Make the mess a bit more understandable
by always using the __intel_wait_for_register*() stuff.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251110172756.2132-2-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2025-11-10 19:27:40 +02:00
parent 00eda392c7
commit d294e4ab22
2 changed files with 14 additions and 34 deletions
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17
drivers/gpu/drm/i915/display/intel_de.h
View File

@@ -104,15 +104,6 @@ intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear, u32 set)
return val;
}
static inline int
__intel_de_wait_for_register_nowl(struct intel_display *display,
i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout_ms)
{
return intel_wait_for_register(__to_uncore(display), reg, mask,
value, timeout_ms);
}
static inline int
__intel_de_wait_for_register_atomic_nowl(struct intel_display *display,
i915_reg_t reg,
@@ -131,8 +122,8 @@ intel_de_wait(struct intel_display *display, i915_reg_t reg,
intel_dmc_wl_get(display, reg);
ret = __intel_de_wait_for_register_nowl(display, reg, mask, value,
timeout_ms);
ret = __intel_wait_for_register(__to_uncore(display), reg, mask,
value, 2, timeout_ms, NULL);
intel_dmc_wl_put(display, reg);
@@ -147,8 +138,8 @@ intel_de_wait_fw(struct intel_display *display, i915_reg_t reg,
intel_dmc_wl_get(display, reg);
ret = intel_wait_for_register_fw(__to_uncore(display), reg, mask,
value, timeout_ms, out_value);
ret = __intel_wait_for_register_fw(__to_uncore(display), reg, mask,
value, 2, timeout_ms, out_value);
intel_dmc_wl_put(display, reg);

31
drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
View File

@@ -91,27 +91,6 @@ static inline u32 intel_uncore_rmw(struct intel_uncore *uncore,
return xe_mmio_rmw32(__compat_uncore_to_mmio(uncore), reg, clear, set);
}
static inline int intel_wait_for_register(struct intel_uncore *uncore,
i915_reg_t i915_reg, u32 mask,
u32 value, unsigned int timeout)
{
struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value,
timeout * USEC_PER_MSEC, NULL, false);
}
static inline int intel_wait_for_register_fw(struct intel_uncore *uncore,
i915_reg_t i915_reg, u32 mask,
u32 value, unsigned int timeout,
u32 *out_value)
{
struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value,
timeout * USEC_PER_MSEC, out_value, false);
}
static inline int
__intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg,
u32 mask, u32 value, unsigned int fast_timeout_us,
@@ -133,6 +112,16 @@ __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg,
out_value, atomic);
}
static inline int
__intel_wait_for_register_fw(struct intel_uncore *uncore, i915_reg_t i915_reg,
u32 mask, u32 value, unsigned int fast_timeout_us,
unsigned int slow_timeout_ms, u32 *out_value)
{
return __intel_wait_for_register(uncore, i915_reg, mask, value,
fast_timeout_us, slow_timeout_ms,
out_value);
}
static inline u32 intel_uncore_read_fw(struct intel_uncore *uncore,
i915_reg_t i915_reg)
{