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arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port

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On the Avaota A1 board, the second Ethernet controller, aka the GMAC200,
is connected to a second external RTL8211F-CG PHY. The PHY uses an
external 25MHz crystal, and has the SoC's PJ16 pin connected to its
reset pin.

Enable the second Ethernet port. Also fix up the label for the existing
external PHY connected to the first Ethernet port.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250923140247.2622602-6-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai
2025-09-23 22:02:45 +08:00
parent 7076938d20
commit 2e5d147ba9
1 changed files with 24 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
View File

@@ -13,6 +13,7 @@
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
serial0 = &uart0;
};
@@ -73,7 +74,7 @@
&gmac0 {
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-handle = <&ext_rgmii0_phy>;
phy-supply = <&reg_dcdc4>;
allwinner,tx-delay-ps = <100>;
@@ -82,13 +83,24 @@
status = "okay";
};
&gmac1 {
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii1_phy>;
phy-supply = <&reg_dcdc4>;
tx-internal-delay-ps = <100>;
rx-internal-delay-ps = <100>;
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdc2>;
status = "okay";
};
&mdio0 {
ext_rgmii_phy: ethernet-phy@1 {
ext_rgmii0_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
@@ -97,6 +109,16 @@
};
};
&mdio1 {
ext_rgmii1_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */
reset-assert-us = <10000>;
reset-deassert-us = <150000>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo3>;
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */