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arm64: dts: allwinner: a527: cubie-a5e: Enable second Ethernet port

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On the Radxa Cubie A5E board, the second Ethernet controller, aka the
GMAC200, is connected to a second external Maxio MAE0621A PHY. The PHY
uses an external 25MHz crystal, and has the SoC's PJ16 pin connected to
its reset pin.

Enable the second Ethernet port. Also fix up the label for the existing
external PHY connected to the first Ethernet port. An enable delay for the
PHY supply regulator is added to make sure the PHY's internal regulators
are fully powered and the PHY is operational.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250923140247.2622602-5-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai
2025-09-23 22:02:44 +08:00
parent 460a71b564
commit 7076938d20
1 changed files with 26 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
View File

@@ -14,6 +14,7 @@
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
serial0 = &uart0;
};
@@ -75,7 +76,7 @@
&gmac0 {
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-handle = <&ext_rgmii0_phy>;
phy-supply = <&reg_cldo3>;
allwinner,tx-delay-ps = <300>;
@@ -84,13 +85,24 @@
status = "okay";
};
&gmac1 {
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii1_phy>;
phy-supply = <&reg_cldo4>;
tx-internal-delay-ps = <300>;
rx-internal-delay-ps = <400>;
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdc2>;
status = "okay";
};
&mdio0 {
ext_rgmii_phy: ethernet-phy@1 {
ext_rgmii0_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
@@ -99,6 +111,16 @@
};
};
&mdio1 {
ext_rgmii1_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */
reset-assert-us = <10000>;
reset-deassert-us = <150000>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo3>;
cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
@@ -250,6 +272,8 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pj-phy";
/* enough time for the PHY to fully power on */
regulator-enable-ramp-delay = <150000>;
};
reg_cpusldo: cpusldo {