Jiancheng Xue 6c9da387c8 clk: hisilicon: add CRG driver for hi3519 soc ...

The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

2016-05-06 11:13:32 -07:00

1.3 KiB

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