Kefeng Wang 48084c3595 riscv: perf: RISCV_BASE_PMU should be independent ...

Selecting PERF_EVENTS without selecting RISCV_BASE_PMU results in a build
error.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
[Palmer: commit text]
Fixes: 178e9fc47aae("perf: riscv: preliminary RISC-V support")
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

2020-05-12 16:21:46 -07:00

2.2 KiB

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