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This patch updates the SPI clock selection logic for cases where timing calibration is not performed or the results are failed. Timing calibration process is skipped in the two scenarios below. - Low-entropy data in the calibration region: The driver skips timing calibration if the data read from the SPI flash contains mostly 0x00 or 0xFF. Originally, the driver used a low-frequency clock to read this region as golden data. However, due to variations in host characteristics and image layout, we cannot assume sufficient entropy in this region to ensure reliable calibration. - Low-speed configurations (< 40MHz): The ASPEED SPI controller does not support timing calibration when the max_speed_hz of the SPI device is below 40MHz. In both cases, the SPI clock frequency specified in the device tree should be used directly. When timing calibration is skipped, it is the board vendor's responsibility to ensure that the SPI flash SI (Signal Integrity) is sufficient for reliable operation at the configured frequency. When timing calibration processes is execued and all potential clock frequencies are performed, but are all failed, the lower clock frequency should be adopted to ensure the overall system can boot up successfully. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Link: https://patch.msgid.link/20251001112605.1130723-2-chin-ting_kuo@aspeedtech.com Signed-off-by: Mark Brown <broonie@kernel.org>
Linux kernel
============
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