Commit Graph

1203201 Commits

Author SHA1 Message Date
Lee Jones
3dd8a754a5 drm/amd/amdgpu/amdgpu_ras: Increase buffer size to account for all possible values
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c: In function ‘amdgpu_ras_sysfs_create’:
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1406:20: warning: ‘_err_count’ directive output may be truncated writing 10 bytes into a region of size between 1 and 32 [-Wformat-truncation=]
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1405:9: note: ‘snprintf’ output between 11 and 42 bytes into a destination of size 32

Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:27:03 -04:00
Lee Jones
8057a9d656 drm/amd/amdgpu/amdgpu_device: Provide suitable description for param 'xcc_id'
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:516: warning: Function parameter or member 'xcc_id' not described in 'amdgpu_mm_wreg_mmio_rlc'

Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:58 -04:00
Lee Jones
01ee1f8aea drm/radeon/radeon_ttm: Remove unused variable 'rbo' from radeon_bo_move()
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/radeon/radeon_ttm.c: In function ‘radeon_bo_move’:
 drivers/gpu/drm/radeon/radeon_ttm.c:201:27: warning: variable ‘rbo’ set but not used [-Wunused-but-set-variable]

Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:54 -04:00
Colin Ian King
ddf1639b54 drm/amd: Fix spelling mistake "throtting" -> "throttling"
There is a spelling mistake in variable throtting_events, rename
it to throttling_events.

Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:50 -04:00
Christophe JAILLET
415b7ba36a drm/amdgpu: Use kvzalloc() to simplify code
kvzalloc() can be used instead of kvmalloc() + memset() + explicit NULL
assignments.

It is less verbose and more future proof.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:47 -04:00
Christophe JAILLET
5f5c75bf16 drm/amdgpu: Remove amdgpu_bo_list_array_entry()
Now that there is an explicit flexible array at the end of 'struct
amdgpu_bo_list', it can be used to remove amdgpu_bo_list_array_entry() and
simplify some macro.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:45 -04:00
Christophe JAILLET
a23abe1fbd drm/amdgpu: Remove a redundant sanity check
The case where 'num_entries' is too big, is already handled by
struct_size(), because kvmalloc() would fail.

It will return -ENOMEM instead of -EINVAL, but it is only related to a
unlikely to happen sanity check.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:38 -04:00
Christophe JAILLET
ff49bd2c74 drm/amdgpu: Explicitly add a flexible array at the end of 'struct amdgpu_bo_list'
'struct amdgpu_bo_list' is really used as if it was ended by a flex array.
So make it more explicit and add a 'struct amdgpu_bo_list_entry entries[]'
field at the end of the structure.

This way, struct_size() can be used when it is allocated.
It is less verbose.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:32 -04:00
Hamza Mahfooz
ac0ec1c7d1 drm/amd/display: register edp_backlight_control() for DCN301
As made mention of in commit 099303e9a9 ("drm/amd/display: eDP
intermittent black screen during PnP"), we need to turn off the
display's backlight before powering off an eDP display. Not doing so
will result in undefined behaviour according to the eDP spec. So, set
DCN301's edp_backlight_control() function pointer to
dce110_edp_backlight_control().

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2765
Fixes: 9c75891fee ("drm/amd/display: rework recent update PHY state commit")
Suggested-by: Swapnil Patel <swapnil.patel@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:26:00 -04:00
Hawking Zhang
ec70578c83 drm/amdgpu: Allow issue disable gfx ras cmd to firmware
Disable gfx ras command is needed in some use cases

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:25:54 -04:00
Lijo Lazar
e370f8f389 drm/amdgpu: Add bootloader wait for PSP v13
Implement the wait for bootloader call back for PSP v13.0 ASICs. Only
for ASICs with PSP v13.0.6, it needs an additional check for VBIOS
mailbox status.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:25:44 -04:00
Hamza Mahfooz
1c6b6bd078 drm/amdgpu: register a dirty framebuffer callback for fbcon
fbcon requires that we implement &drm_framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it may cause too many atomic commits to be made at
once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers (we can use the "struct drm_file file" parameter in the
callback to check for this since it is only NULL when called by fbcon,
at least in the mainline kernel) on devices that support atomic KMS.

Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: stable@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:25:34 -04:00
Darren Powell
8525d41b02 amdgpu/pm: Replace print_clock_levels with emit_clock_levels for arcturus
Replace print_clock_levels with emit_clock_levels for arcturus
  * replace .print_clk_levels with .emit_clk_levels in arcturus_ppt_funcs
  * added extra parameter int *offset
  * removed var size, uses arg *offset instead
  * removed call to smu_cmn_get_sysfs_buf
  * errors are returned to caller
  * returns 0 on success
additional incidental changes
  * changed type of var i, now to remove comparing mismatch types
  * renamed var s/now/cur_value/
  * switch statement default now returns -EINVAL
  * RAS Recovery returns -EBUSY

Based on
  commit b06b48d7dd ("amdgpu/pm: Implement emit_clk_levels for navi10")

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:23:36 -04:00
Evan Quan
0bc053404d drm/amd/pm: fulfill the support for SMU13 pp_dpm_dcefclk interface
Fulfill the incomplete SMU13 `pp_dpm_dcefclk` implementation.

Reported-by: Guan Yu <guan.yu@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:23:30 -04:00
Evan Quan
e835bc2628 drm/amd/pm: correct SMU13 gfx voltage related OD settings
The voltage offset setting will be applied to the whole v/f curve line
instead of per anchor point base.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:23:21 -04:00
Jesse Zhang
2c01726389 drm/amdgpu/pm: Remove the duplicate dpm status check
Since the smu firmware has fixed the issue that described in the commit 60d61f4ed6
("drm/amdgpu/pm: fix the Stable pstate Test in amdgpu_test").
So we only need keep dpm status check in the funciton - smu_v13_0_5_set_soft_freq_limited_range.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:21:17 -04:00
Kun Liu
102b80f682 drm/amd/pm: Vangogh: Get average_* from average field of gpu_metrics_table
for older BIOS, smu won't fill average field of gpu_metrics_table, so we acquire
average_* from current field. but now average value is available in gpu_metrics_v2_4

Signed-off-by: Kun Liu <Kun.Liu2@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:21:07 -04:00
Srinivasan Shanmugam
d1090194cb drm/amd/pm: Fixes incorrect type in 'amdgpu_hwmon_show_power_avg() & _input()'
The val is defined as unsigned int type, if(val<0) is invalid, hence
modified its type to ssize_t

Fixes the below:

drivers/gpu/drm/amd/pm/amdgpu_pm.c:2800:5-8: WARNING: Unsigned expression compared with zero: val < 0
drivers/gpu/drm/amd/pm/amdgpu_pm.c:2813:5-8: WARNING: Unsigned expression compared with zero: val < 0

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:48 -04:00
Alex Deucher
a560085316 drm/amd/pm: fix error flow in sensor fetching
Sensor fetching functions should return an signed int to
handle errors properly.

Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reported-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:36 -04:00
Mangesh Gadre
7caebc8f99 drm/amdgpu: Updated TCP/UTCL1 programming
Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:14 -04:00
Srinivasan Shanmugam
f54e1d47e0 drm/amdgpu: Fix kcalloc over kzalloc in 'gmc_v9_0_init_mem_ranges'
Replace kzalloc(n * sizeof(...), ...) with kcalloc(n, sizeof(...), ...)
since kcalloc is the preferred API in case of allocating with multiply.

Fixes the below:

WARNING: Prefer kcalloc over kzalloc with multiply

Cc: Guchun Chen <guchun.chen@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:20:02 -04:00
Alex Deucher
e0e1764a3a drm/amd/pm: fix debugfs pm_info output
Print both input and avg power.

Fixes: 47f1724db4 ("drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`")
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:19:24 -04:00
Philip Yang
5d44a766f7 drm/amdkfd: Share the original BO for GTT mapping
If mGPUs is on same IOMMU group, or is ram direct mapped, then mGPUs
can share the original BO for GTT mapping dma address, without creating
new BO from export/import dmabuf.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:19:07 -04:00
Hawking Zhang
2c0f880abc drm/amdgpu: Fix the return for gpu mode1_reset
amdgpu_device_mode1_reset will return gpu mode1_reset
succeed (ret = 0) as long as wait_for_bootloader call
succeed, regardless of the status reported by smu or
psp firmware. This results to driver continue executing
recovery even smu or psp fail to perform mode1 reset.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:44 -04:00
Aric Cyr
c234cd5f08 drm/amd/display: 3.2.248
This version brings along following fixes:
- Ensure FS is enabled before sending request to DMUB for FS changes
- Add check for PMFW hard min request complete
- Save addr update in scratch before flip
- Fix static screen detection setting
- Write flip addr to scratch reg for subvp
- set minimum of VBlank_nom
- Correct unit conversion for vstartup
- Roll back unit correction
- Enable runtime register offset init for DCN32 DMUB
- Refactor edp power control
- PQ regamma end point
- PQ tail accuracy
- Expose mall capability

Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:41 -04:00
Anthony Koo
af23474345 drm/amd/display: [FW Promotion] Release 0.0.180.0
- Remove unused flag otg_powered_down

Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:36 -04:00
Samson Tam
99f596fc9c drm/amd/display: ensure FS is enabled before sending request to DMUB for FS changes
[Why]
ignore_msa_timing_param indicates FS is capable but not necessarily enabled

[How]
add check for either allow_freesync or vrr_active_variable to confirm FS is enabled

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:33 -04:00
Samson Tam
5133b8d2ff drm/amd/display: add check for PMFW hard min request complete
[Why]
When we issue hard min request to PMFW, the ack back does not
guarantee the request has been fulfilled.

[How]
Add new PMFW message to check if the hard min request has been
completed. Returned bit mask indicates which clock requests are
completed. Check PMFW version before using message

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:30 -04:00
Alvin Lee
a03aa4e040 drm/amd/display: Save addr update in scratch before flip
[Why & How]
Fix a minor sequencing issue where the address update for
a subvp flip should be saved in scratch registers before
the actual flip

Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:27 -04:00
SungHuai Wang
b1803560ba drm/amd/display: fix static screen detection setting
[WHY]
OTG_STATIC_SCREEN_EVENT_MASK is changed in DCN3,
but we still follow DCN2 to apply setting for
OTG_STATIC_SCREEN_EVENT_MASK.

[How]
Add new function to apply correct settings for DCN3 series.

Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: SungHuai Wang <danny.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:18 -04:00
benl
96271dd4d5 drm/amdgpu: add gfxhub 11.5.0 support
Add initial gfxhub 11.5 support.

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:15 -04:00
Prike Liang
b90975fa5b drm/amdgpu: enable gmc11 for GC 11.5.0
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:13 -04:00
Lang Yu
aba2be4147 drm/amdgpu: add mmhub 3.3.0 support
Add initial implementation for mmhub 3.3.0.

v2: squash in client id fix (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:09 -04:00
Lang Yu
1aa68225de drm/amdgpu: add mmhub 3.3.0 headers
Add new headers.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:06 -04:00
Prike Liang
b5549a2df0 drm/amdgpu/discovery: enable gfx11 for GC 11.5.0
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:01:03 -04:00
Lang Yu
d3ff0189c1 drm/amdgpu/discovery: enable mes block for gc 11.5.0
Add to IP discovery table.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:59 -04:00
Aaron Liu
10c9d86918 drm/amdgpu: add mes firmware support for gc_11_5_0
Add scheduler and kiq firmware support for gc_11_5_0.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:57 -04:00
Aaron Liu
d717da1775 drm/amdgpu: add imu firmware support for gc_11_5_0
Add imu firmware support for gc_11_5_0.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:54 -04:00
Lang Yu
afac198cd1 drm/amdkfd: add KFD support for GC 11.5.0
Enable KFD for GC 11.5.0.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:51 -04:00
Aaron Liu
8e42b463df drm/amdgpu: add golden setting for gc_11_5_0
Initialize golden setting for gc_11_5_0.

v2: squash in latest golden updates (Alex)
v3: squash in checkpatch fix (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:47 -04:00
Prike Liang
15e7cbd91d drm/amdgpu/gfx11: initialize gfx11.5.0
Initalize gfx 11.5.0 and set gfx hw configuration.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:44 -04:00
Prike Liang
dd5a326155 drm/amdgpu/gmc11: initialize GMC for GC 11.5.0 memory support
Initialize vram attribute and VMHUB for GC 11.5.0.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:39 -04:00
Lang Yu
bfb1ee9451 drm/amdgpu: add gc headers for gc 11.5.0
Add gc_11_5_0 headers.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:34 -04:00
Prike Liang
d9d6833442 drm/amdgpu/discovery: add nbio 7.11.0 support
Add to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:30 -04:00
benl
e44d856eaa drm/amdgpu: add nbio 7.11 support
Add initial nbio 7.11 implementation.

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:27 -04:00
benl
ca8c68142a drm/amdgpu: add nbio 7.11 registers
Add register headers.

v2: Updates (Alex)
v3: Updates (Alex)
v4: Updates (Alex)

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:24 -04:00
Prike Liang
bb7249ee45 drm/amdgpu/discovery: enable soc21 support
Add 11.5.0 to IP discovery table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:22 -04:00
Prike Liang
0d1db799e7 drm/amdgpu/soc21: add initial GC 11.5.0 soc21 support
Disable clock gating and power gating on the early bring up phase.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:18 -04:00
Prike Liang
2c8a7ca164 drm/amdgpu: add new AMDGPU_FAMILY definition
add GC 11.5.0 family

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:15 -04:00
Lang Yu
f56c1941eb drm/amdgpu: use 6.1.0 register offset for HDP CLK_CNTL
Use 6.1.0 register offset and remove unused variable.

v2: clean up logic (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 15:00:12 -04:00