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x86/cpu: Introduce and use CPUID leaf 0x2 parsing helpers
Introduce CPUID leaf 0x2 parsing helpers at <asm/cpuid/leaf_0x2_api.h>. This allows sharing the leaf 0x2's output validation and iteration logic across both x86/cpu intel.c and cacheinfo.c. Start by converting intel.c to the new API. Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/20250324133324.23458-4-darwi@linutronix.de
This commit is contained in:
committed by
Ingo Molnar
parent
09a1da4beb
commit
fe78079ec0
@@ -4,5 +4,6 @@
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#define _ASM_X86_CPUID_H
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#include <asm/cpuid/api.h>
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#include <asm/cpuid/leaf_0x2_api.h>
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#endif /* _ASM_X86_CPUID_H */
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65
arch/x86/include/asm/cpuid/leaf_0x2_api.h
Normal file
65
arch/x86/include/asm/cpuid/leaf_0x2_api.h
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@@ -0,0 +1,65 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CPUID_LEAF_0x2_API_H
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#define _ASM_X86_CPUID_LEAF_0x2_API_H
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#include <asm/cpuid/api.h>
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#include <asm/cpuid/types.h>
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/**
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* cpuid_get_leaf_0x2_regs() - Return sanitized leaf 0x2 register output
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* @regs: Output parameter
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*
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* Query CPUID leaf 0x2 and store its output in @regs. Force set any
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* invalid 1-byte descriptor returned by the hardware to zero (the NULL
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* cache/TLB descriptor) before returning it to the caller.
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*
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* Use for_each_leaf_0x2_desc() to iterate over the returned output.
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*/
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static inline void cpuid_get_leaf_0x2_regs(union leaf_0x2_regs *regs)
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{
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cpuid_leaf(0x2, regs);
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/*
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* All Intel CPUs must report an iteration count of 1. In case
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* of bogus hardware, treat all returned descriptors as NULL.
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*/
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if (regs->desc[0] != 0x01) {
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for (int i = 0; i < 4; i++)
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regs->regv[i] = 0;
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return;
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}
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/*
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* The most significant bit (MSB) of each register must be clear.
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* If a register is invalid, replace its descriptors with NULL.
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*/
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for (int i = 0; i < 4; i++) {
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if (regs->reg[i].invalid)
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regs->regv[i] = 0;
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}
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}
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/**
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* for_each_leaf_0x2_desc() - Iterator for CPUID leaf 0x2 descriptors
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* @regs: Leaf 0x2 output, as returned by cpuid_get_leaf_0x2_regs()
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* @desc: Pointer to the returned descriptor for each iteration
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*
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* Loop over the 1-byte descriptors in the passed leaf 0x2 output registers
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* @regs. Provide each descriptor through @desc.
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*
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* Note that the first byte is skipped as it is not a descriptor.
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*
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* Sample usage::
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*
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* union leaf_0x2_regs regs;
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* u8 *desc;
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*
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* cpuid_get_leaf_0x2_regs(®s);
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* for_each_leaf_0x2_desc(regs, desc) {
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* // Handle *desc value
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* }
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*/
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#define for_each_leaf_0x2_desc(regs, desc) \
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for (desc = &(regs).desc[1]; desc < &(regs).desc[16]; desc++)
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#endif /* _ASM_X86_CPUID_LEAF_0x2_API_H */
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@@ -29,4 +29,20 @@ enum cpuid_regs_idx {
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#define CPUID_LEAF_FREQ 0x16
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#define CPUID_LEAF_TILE 0x1d
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/*
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* Types for CPUID(0x2) parsing
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* Check <asm/cpuid/leaf_0x2_api.h>
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*/
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struct leaf_0x2_reg {
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u32 : 31,
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invalid : 1;
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};
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union leaf_0x2_regs {
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struct leaf_0x2_reg reg[4];
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u32 regv[4];
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u8 desc[16];
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};
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#endif /* _ASM_X86_CPUID_TYPES_H */
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@@ -16,6 +16,7 @@
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#include <asm/cpu_device_id.h>
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#include <asm/cpufeature.h>
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#include <asm/cpu.h>
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#include <asm/cpuid.h>
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#include <asm/hwcap2.h>
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#include <asm/intel-family.h>
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#include <asm/microcode.h>
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@@ -778,27 +779,15 @@ static void intel_tlb_lookup(const unsigned char desc)
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static void intel_detect_tlb(struct cpuinfo_x86 *c)
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{
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u32 regs[4];
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u8 *desc = (u8 *)regs;
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union leaf_0x2_regs regs;
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u8 *desc;
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if (c->cpuid_level < 2)
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return;
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cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]);
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/* Intel CPUs must report an iteration count of 1 */
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if (desc[0] != 0x01)
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return;
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/* If a register's bit 31 is set, it is an unknown format */
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for (int i = 0; i < 4; i++) {
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if (regs[i] & (1 << 31))
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regs[i] = 0;
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}
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/* Skip the first byte as it is not a descriptor */
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for (int i = 1; i < 16; i++)
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intel_tlb_lookup(desc[i]);
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cpuid_get_leaf_0x2_regs(®s);
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for_each_leaf_0x2_desc(regs, desc)
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intel_tlb_lookup(*desc);
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}
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static const struct cpu_dev intel_cpu_dev = {
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