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drm/xe/vf: Use primary GT ordered work queue on media GT on PTL VF

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VF CCS restore is a primary GT operation on which the media GT depends.
Therefore, it doesn't make much sense to run these operations in
parallel. To address this, point the media GT's ordered work queue to
the primary GT's ordered work queue on platforms that require (PTL VFs)
CCS restore as part of VF post-migration recovery.

v7:
 - Remove bool from xe_gt_alloc (Lucas)
v9:
 - Fix typo (Lucas)

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20251008214532.3442967-32-matthew.brost@intel.com
This commit is contained in:
Matthew Brost
2025-10-08 14:45:29 -07:00
parent 673167d9f0
commit efd38d619a
4 changed files with 19 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/xe/xe_device_types.h
View File

@@ -329,6 +329,8 @@ struct xe_device {
u8 skip_mtcfg:1;
/** @info.skip_pcode: skip access to PCODE uC */
u8 skip_pcode:1;
/** @info.needs_shared_vf_gt_wq: needs shared GT WQ on VF */
u8 needs_shared_vf_gt_wq:1;
} info;
/** @wa_active: keep track of active workarounds */

18
drivers/gpu/drm/xe/xe_gt.c
View File

@@ -67,7 +67,11 @@
struct xe_gt *xe_gt_alloc(struct xe_tile *tile)
{
struct drm_device *drm = &tile_to_xe(tile)->drm;
struct xe_device *xe = tile_to_xe(tile);
struct drm_device *drm = &xe->drm;
bool shared_wq = xe->info.needs_shared_vf_gt_wq && tile->primary_gt &&
IS_SRIOV_VF(xe);
struct workqueue_struct *ordered_wq;
struct xe_gt *gt;
gt = drmm_kzalloc(drm, sizeof(*gt), GFP_KERNEL);
@@ -75,9 +79,15 @@ struct xe_gt *xe_gt_alloc(struct xe_tile *tile)
return ERR_PTR(-ENOMEM);
gt->tile = tile;
gt->ordered_wq = drmm_alloc_ordered_workqueue(drm, "gt-ordered-wq", WQ_MEM_RECLAIM);
if (IS_ERR(gt->ordered_wq))
return ERR_CAST(gt->ordered_wq);
if (shared_wq && tile->primary_gt->ordered_wq)
ordered_wq = tile->primary_gt->ordered_wq;
else
ordered_wq = drmm_alloc_ordered_workqueue(drm, "gt-ordered-wq",
WQ_MEM_RECLAIM);
if (IS_ERR(ordered_wq))
return ERR_CAST(ordered_wq);
gt->ordered_wq = ordered_wq;
return gt;
}

2
drivers/gpu/drm/xe/xe_pci.c
View File

@@ -347,6 +347,7 @@ static const struct xe_device_desc ptl_desc = {
.has_sriov = true,
.max_gt_per_tile = 2,
.needs_scratch = true,
.needs_shared_vf_gt_wq = true,
};
#undef PLATFORM
@@ -596,6 +597,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;
xe->info.needs_scratch = desc->needs_scratch;
xe->info.needs_shared_vf_gt_wq = desc->needs_shared_vf_gt_wq;
xe->info.probe_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
xe_modparam.probe_display &&

1
drivers/gpu/drm/xe/xe_pci_types.h
View File

@@ -48,6 +48,7 @@ struct xe_device_desc {
u8 skip_guc_pc:1;
u8 skip_mtcfg:1;
u8 skip_pcode:1;
u8 needs_shared_vf_gt_wq:1;
};
struct xe_graphics_desc {