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Merge branch 'txgbe-feat-new-aml-firmware'
Jiawen Wu says: ==================== TXGBE feat new AML firmware The firmware of AML devices are redesigned to adapt to more PHY interfaces. Optimize the driver to be compatible with the new firmware. v1: https://lore.kernel.org/all/20250928093923.30456-1-jiawenwu@trustnetic.com/ ==================== Link: https://patch.msgid.link/20251014061726.36660-1-jiawenwu@trustnetic.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@@ -1271,8 +1271,6 @@ struct wx {
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/* PHY stuff */
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bool notify_down;
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int adv_speed;
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int adv_duplex;
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unsigned int link;
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int speed;
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int duplex;
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@@ -19,8 +19,8 @@ void txgbe_gpio_init_aml(struct wx *wx)
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{
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u32 status;
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wr32(wx, WX_GPIO_INTTYPE_LEVEL, TXGBE_GPIOBIT_2 | TXGBE_GPIOBIT_3);
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wr32(wx, WX_GPIO_INTEN, TXGBE_GPIOBIT_2 | TXGBE_GPIOBIT_3);
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wr32(wx, WX_GPIO_INTTYPE_LEVEL, TXGBE_GPIOBIT_2);
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wr32(wx, WX_GPIO_INTEN, TXGBE_GPIOBIT_2);
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status = rd32(wx, WX_GPIO_INTSTATUS);
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for (int i = 0; i < 6; i++) {
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@@ -42,11 +42,6 @@ irqreturn_t txgbe_gpio_irq_handler_aml(int irq, void *data)
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wr32(wx, WX_GPIO_EOI, TXGBE_GPIOBIT_2);
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wx_service_event_schedule(wx);
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}
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if (status & TXGBE_GPIOBIT_3) {
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set_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags);
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wx_service_event_schedule(wx);
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wr32(wx, WX_GPIO_EOI, TXGBE_GPIOBIT_3);
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}
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wr32(wx, WX_GPIO_INTMASK, 0);
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return IRQ_HANDLED;
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@@ -96,6 +91,9 @@ static int txgbe_set_phy_link_hostif(struct wx *wx, int speed, int autoneg, int
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case SPEED_10000:
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buffer.speed = TXGBE_LINK_SPEED_10GB_FULL;
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break;
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default:
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buffer.speed = TXGBE_LINK_SPEED_UNKNOWN;
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break;
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}
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buffer.fec_mode = TXGBE_PHY_FEC_AUTO;
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@@ -106,22 +104,21 @@ static int txgbe_set_phy_link_hostif(struct wx *wx, int speed, int autoneg, int
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WX_HI_COMMAND_TIMEOUT, true);
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}
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static void txgbe_get_link_capabilities(struct wx *wx)
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static void txgbe_get_link_capabilities(struct wx *wx, int *speed, int *duplex)
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{
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struct txgbe *txgbe = wx->priv;
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if (test_bit(PHY_INTERFACE_MODE_25GBASER, txgbe->sfp_interfaces))
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wx->adv_speed = SPEED_25000;
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*speed = SPEED_25000;
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else if (test_bit(PHY_INTERFACE_MODE_10GBASER, txgbe->sfp_interfaces))
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wx->adv_speed = SPEED_10000;
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*speed = SPEED_10000;
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else
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wx->adv_speed = SPEED_UNKNOWN;
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*speed = SPEED_UNKNOWN;
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wx->adv_duplex = wx->adv_speed == SPEED_UNKNOWN ?
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DUPLEX_HALF : DUPLEX_FULL;
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*duplex = *speed == SPEED_UNKNOWN ? DUPLEX_HALF : DUPLEX_FULL;
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}
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static void txgbe_get_phy_link(struct wx *wx, int *speed)
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static void txgbe_get_mac_link(struct wx *wx, int *speed)
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{
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u32 status;
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@@ -138,23 +135,11 @@ static void txgbe_get_phy_link(struct wx *wx, int *speed)
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int txgbe_set_phy_link(struct wx *wx)
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{
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int speed, err;
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u32 gpio;
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int speed, duplex, err;
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/* Check RX signal */
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gpio = rd32(wx, WX_GPIO_EXT);
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if (gpio & TXGBE_GPIOBIT_3)
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return -ENODEV;
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txgbe_get_link_capabilities(wx, &speed, &duplex);
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txgbe_get_link_capabilities(wx);
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if (wx->adv_speed == SPEED_UNKNOWN)
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return -ENODEV;
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txgbe_get_phy_link(wx, &speed);
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if (speed == wx->adv_speed)
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return 0;
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err = txgbe_set_phy_link_hostif(wx, wx->adv_speed, 0, wx->adv_duplex);
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err = txgbe_set_phy_link_hostif(wx, speed, 0, duplex);
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if (err) {
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wx_err(wx, "Failed to setup link\n");
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return err;
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@@ -230,14 +215,7 @@ int txgbe_identify_sfp(struct wx *wx)
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return -ENODEV;
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}
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err = txgbe_sfp_to_linkmodes(wx, id);
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if (err)
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return err;
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if (gpio & TXGBE_GPIOBIT_3)
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set_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags);
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return 0;
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return txgbe_sfp_to_linkmodes(wx, id);
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}
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void txgbe_setup_link(struct wx *wx)
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@@ -256,7 +234,7 @@ static void txgbe_get_link_state(struct phylink_config *config,
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struct wx *wx = phylink_to_wx(config);
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int speed;
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txgbe_get_phy_link(wx, &speed);
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txgbe_get_mac_link(wx, &speed);
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state->link = speed != SPEED_UNKNOWN;
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state->speed = speed;
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state->duplex = state->link ? DUPLEX_FULL : DUPLEX_UNKNOWN;
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@@ -314,6 +314,7 @@ void txgbe_up(struct wx *wx);
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int txgbe_setup_tc(struct net_device *dev, u8 tc);
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void txgbe_do_reset(struct net_device *netdev);
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#define TXGBE_LINK_SPEED_UNKNOWN 0
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#define TXGBE_LINK_SPEED_10GB_FULL 4
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#define TXGBE_LINK_SPEED_25GB_FULL 0x10
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@@ -352,7 +353,9 @@ struct txgbe_sfp_id {
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u8 vendor_oui0; /* A0H 0x25 */
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u8 vendor_oui1; /* A0H 0x26 */
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u8 vendor_oui2; /* A0H 0x27 */
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u8 reserved[3];
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u8 transceiver_type; /* A0H 0x83 */
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u8 sff_opt1; /* A0H 0xC0 */
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u8 reserved[5];
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};
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struct txgbe_hic_i2c_read {
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