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Merge branch 'net-dsa-yt921x-fix-parsing-mib-attributes'

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David Yang says:

====================
net: dsa: yt921x: Fix parsing MIB attributes
====================

Link: https://patch.msgid.link/20251126084024.2843851-1-mmyangfl@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-11-27 17:55:58 -08:00
parent 17e9f841dd fbce7b36c8
commit ebb2eaeb05
2 changed files with 94 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files

85
drivers/net/dsa/yt921x.c
View File

@@ -39,60 +39,55 @@ struct yt921x_mib_desc {
* to perform 32bit MIB overflow wraparound.
*/
static const struct yt921x_mib_desc yt921x_mib_descs[] = {
MIB_DESC(1, 0x00, NULL), /* RxBroadcast */
MIB_DESC(1, 0x04, NULL), /* RxPause */
MIB_DESC(1, 0x08, NULL), /* RxMulticast */
MIB_DESC(1, 0x0c, NULL), /* RxCrcErr */
MIB_DESC(1, YT921X_MIB_DATA_RX_BROADCAST, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PAUSE, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_MULTICAST, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_CRC_ERR, NULL),
MIB_DESC(1, 0x10, NULL), /* RxAlignErr */
MIB_DESC(1, 0x14, NULL), /* RxUnderSizeErr */
MIB_DESC(1, 0x18, NULL), /* RxFragErr */
MIB_DESC(1, 0x1c, NULL), /* RxPktSz64 */
MIB_DESC(1, YT921X_MIB_DATA_RX_ALIGN_ERR, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_UNDERSIZE_ERR, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_FRAG_ERR, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_64, NULL),
MIB_DESC(1, 0x20, NULL), /* RxPktSz65To127 */
MIB_DESC(1, 0x24, NULL), /* RxPktSz128To255 */
MIB_DESC(1, 0x28, NULL), /* RxPktSz256To511 */
MIB_DESC(1, 0x2c, NULL), /* RxPktSz512To1023 */
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023, NULL),
MIB_DESC(1, 0x30, NULL), /* RxPktSz1024To1518 */
MIB_DESC(1, 0x34, NULL), /* RxPktSz1519ToMax */
MIB_DESC(2, 0x38, NULL), /* RxGoodBytes */
/* 0x3c */
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX, NULL),
MIB_DESC(2, YT921X_MIB_DATA_RX_GOOD_BYTES, NULL),
MIB_DESC(2, 0x40, "RxBadBytes"),
/* 0x44 */
MIB_DESC(2, 0x48, NULL), /* RxOverSzErr */
/* 0x4c */
MIB_DESC(2, YT921X_MIB_DATA_RX_BAD_BYTES, "RxBadBytes"),
MIB_DESC(1, YT921X_MIB_DATA_RX_OVERSIZE_ERR, NULL),
MIB_DESC(1, 0x50, NULL), /* RxDropped */
MIB_DESC(1, 0x54, NULL), /* TxBroadcast */
MIB_DESC(1, 0x58, NULL), /* TxPause */
MIB_DESC(1, 0x5c, NULL), /* TxMulticast */
MIB_DESC(1, YT921X_MIB_DATA_RX_DROPPED, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_BROADCAST, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PAUSE, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_MULTICAST, NULL),
MIB_DESC(1, 0x60, NULL), /* TxUnderSizeErr */
MIB_DESC(1, 0x64, NULL), /* TxPktSz64 */
MIB_DESC(1, 0x68, NULL), /* TxPktSz65To127 */
MIB_DESC(1, 0x6c, NULL), /* TxPktSz128To255 */
MIB_DESC(1, YT921X_MIB_DATA_TX_UNDERSIZE_ERR, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_64, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255, NULL),
MIB_DESC(1, 0x70, NULL), /* TxPktSz256To511 */
MIB_DESC(1, 0x74, NULL), /* TxPktSz512To1023 */
MIB_DESC(1, 0x78, NULL), /* TxPktSz1024To1518 */
MIB_DESC(1, 0x7c, NULL), /* TxPktSz1519ToMax */
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX, NULL),
MIB_DESC(2, 0x80, NULL), /* TxGoodBytes */
/* 0x84 */
MIB_DESC(2, 0x88, NULL), /* TxCollision */
/* 0x8c */
MIB_DESC(2, YT921X_MIB_DATA_TX_GOOD_BYTES, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_COLLISION, NULL),
MIB_DESC(1, 0x90, NULL), /* TxExcessiveCollistion */
MIB_DESC(1, 0x94, NULL), /* TxMultipleCollision */
MIB_DESC(1, 0x98, NULL), /* TxSingleCollision */
MIB_DESC(1, 0x9c, NULL), /* TxPkt */
MIB_DESC(1, YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_MULTIPLE_COLLISION, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_SINGLE_COLLISION, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_PKT, NULL),
MIB_DESC(1, 0xa0, NULL), /* TxDeferred */
MIB_DESC(1, 0xa4, NULL), /* TxLateCollision */
MIB_DESC(1, 0xa8, "RxOAM"),
MIB_DESC(1, 0xac, "TxOAM"),
MIB_DESC(1, YT921X_MIB_DATA_TX_DEFERRED, NULL),
MIB_DESC(1, YT921X_MIB_DATA_TX_LATE_COLLISION, NULL),
MIB_DESC(1, YT921X_MIB_DATA_RX_OAM, "RxOAM"),
MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"),
};
struct yt921x_info {
@@ -705,7 +700,7 @@ static int yt921x_read_mib(struct yt921x_priv *priv, int port)
res = yt921x_reg_read(priv, reg + 4, &val1);
if (res)
break;
val = ((u64)val0 << 32) | val1;
val = ((u64)val1 << 32) | val0;
}
WRITE_ONCE(*valp, val);

54
drivers/net/dsa/yt921x.h
View File

@@ -173,6 +173,60 @@
#define YT921X_MIB_CTRL_ALL_PORT BIT(0)
#define YT921X_MIBn_DATA0(port) (0xc0100 + 0x100 * (port))
#define YT921X_MIBn_DATAm(port, x) (YT921X_MIBn_DATA0(port) + 4 * (x))
#define YT921X_MIB_DATA_RX_BROADCAST 0x00
#define YT921X_MIB_DATA_RX_PAUSE 0x04
#define YT921X_MIB_DATA_RX_MULTICAST 0x08
#define YT921X_MIB_DATA_RX_CRC_ERR 0x0c
#define YT921X_MIB_DATA_RX_ALIGN_ERR 0x10
#define YT921X_MIB_DATA_RX_UNDERSIZE_ERR 0x14
#define YT921X_MIB_DATA_RX_FRAG_ERR 0x18
#define YT921X_MIB_DATA_RX_PKT_SZ_64 0x1c
#define YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127 0x20
#define YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255 0x24
#define YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511 0x28
#define YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023 0x2c
#define YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518 0x30
#define YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX 0x34
/* 0x38: unused */
#define YT921X_MIB_DATA_RX_GOOD_BYTES 0x3c
/* 0x40: 64 bytes */
#define YT921X_MIB_DATA_RX_BAD_BYTES 0x44
/* 0x48: 64 bytes */
#define YT921X_MIB_DATA_RX_OVERSIZE_ERR 0x4c
#define YT921X_MIB_DATA_RX_DROPPED 0x50
#define YT921X_MIB_DATA_TX_BROADCAST 0x54
#define YT921X_MIB_DATA_TX_PAUSE 0x58
#define YT921X_MIB_DATA_TX_MULTICAST 0x5c
#define YT921X_MIB_DATA_TX_UNDERSIZE_ERR 0x60
#define YT921X_MIB_DATA_TX_PKT_SZ_64 0x64
#define YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127 0x68
#define YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255 0x6c
#define YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511 0x70
#define YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023 0x74
#define YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518 0x78
#define YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX 0x7c
/* 0x80: unused */
#define YT921X_MIB_DATA_TX_GOOD_BYTES 0x84
/* 0x88: 64 bytes */
#define YT921X_MIB_DATA_TX_COLLISION 0x8c
#define YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION 0x90
#define YT921X_MIB_DATA_TX_MULTIPLE_COLLISION 0x94
#define YT921X_MIB_DATA_TX_SINGLE_COLLISION 0x98
#define YT921X_MIB_DATA_TX_PKT 0x9c
#define YT921X_MIB_DATA_TX_DEFERRED 0xa0
#define YT921X_MIB_DATA_TX_LATE_COLLISION 0xa4
#define YT921X_MIB_DATA_RX_OAM 0xa8
#define YT921X_MIB_DATA_TX_OAM 0xac
#define YT921X_EDATA_CTRL 0xe0000
#define YT921X_EDATA_CTRL_ADDR_M GENMASK(15, 8)