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net: dsa: yt921x: Use *_ULL bitfield macros for VLAN_CTRL

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VLAN_CTRL should be treated as a 64-bit register. GENMASK and BIT
macros use unsigned long as the underlying type, which will result in a
build error on architectures where sizeof(long) == 4.

Replace them with unsigned long long variants.

Signed-off-by: David Yang <mmyangfl@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20251201094232.3155105-2-mmyangfl@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
David Yang
2025-12-01 17:42:28 +08:00
committed by Jakub Kicinski
parent a2027019e9
commit d973ac83ad
1 changed files with 13 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/net/dsa/yt921x.h
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@@ -382,23 +382,23 @@
#define YT921X_FDB_HW_FLUSH_ON_LINKDOWN BIT(0)
#define YT921X_VLANn_CTRL(vlan) (0x188000 + 8 * (vlan))
#define YT921X_VLAN_CTRL_UNTAG_PORTS_M GENMASK(50, 40)
#define YT921X_VLAN_CTRL_UNTAG_PORTS_M GENMASK_ULL(50, 40)
#define YT921X_VLAN_CTRL_UNTAG_PORTS(x) FIELD_PREP(YT921X_VLAN_CTRL_UNTAG_PORTS_M, (x))
#define YT921X_VLAN_CTRL_UNTAG_PORTn(port) BIT((port) + 40)
#define YT921X_VLAN_CTRL_STP_ID_M GENMASK(39, 36)
#define YT921X_VLAN_CTRL_UNTAG_PORTn(port) BIT_ULL((port) + 40)
#define YT921X_VLAN_CTRL_STP_ID_M GENMASK_ULL(39, 36)
#define YT921X_VLAN_CTRL_STP_ID(x) FIELD_PREP(YT921X_VLAN_CTRL_STP_ID_M, (x))
#define YT921X_VLAN_CTRL_SVLAN_EN BIT(35)
#define YT921X_VLAN_CTRL_FID_M GENMASK(34, 23)
#define YT921X_VLAN_CTRL_SVLAN_EN BIT_ULL(35)
#define YT921X_VLAN_CTRL_FID_M GENMASK_ULL(34, 23)
#define YT921X_VLAN_CTRL_FID(x) FIELD_PREP(YT921X_VLAN_CTRL_FID_M, (x))
#define YT921X_VLAN_CTRL_LEARN_DIS BIT(22)
#define YT921X_VLAN_CTRL_INT_PRI_EN BIT(21)
#define YT921X_VLAN_CTRL_INT_PRI_M GENMASK(20, 18)
#define YT921X_VLAN_CTRL_PORTS_M GENMASK(17, 7)
#define YT921X_VLAN_CTRL_LEARN_DIS BIT_ULL(22)
#define YT921X_VLAN_CTRL_INT_PRI_EN BIT_ULL(21)
#define YT921X_VLAN_CTRL_INT_PRI_M GENMASK_ULL(20, 18)
#define YT921X_VLAN_CTRL_PORTS_M GENMASK_ULL(17, 7)
#define YT921X_VLAN_CTRL_PORTS(x) FIELD_PREP(YT921X_VLAN_CTRL_PORTS_M, (x))
#define YT921X_VLAN_CTRL_PORTn(port) BIT((port) + 7)
#define YT921X_VLAN_CTRL_BYPASS_1X_AC BIT(6)
#define YT921X_VLAN_CTRL_METER_EN BIT(5)
#define YT921X_VLAN_CTRL_METER_ID_M GENMASK(4, 0)
#define YT921X_VLAN_CTRL_PORTn(port) BIT_ULL((port) + 7)
#define YT921X_VLAN_CTRL_BYPASS_1X_AC BIT_ULL(6)
#define YT921X_VLAN_CTRL_METER_EN BIT_ULL(5)
#define YT921X_VLAN_CTRL_METER_ID_M GENMASK_ULL(4, 0)
#define YT921X_TPID_IGRn(x) (0x210000 + 4 * (x)) /* [0, 3] */
#define YT921X_TPID_IGR_TPID_M GENMASK(15, 0)