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drm/msm/adreno: Move gbif_halt() to adreno_gpu_func
Move the gbif halt fn to adreno_gpu_func so that we can call different implementation from common code. This will come handy when we implement A8x layer. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/689005/ Message-ID: <20251118-kaana-gpu-support-v4-7-86eeb8e93fb6@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
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committed by
Rob Clark
parent
491fadb2b8
commit
d46b25b8c1
@@ -1079,7 +1079,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)
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/* Halt the gmu cm3 core */
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gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
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a6xx_bus_clear_pending_transactions(adreno_gpu, true);
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adreno_gpu->funcs->bus_halt(adreno_gpu, true);
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/* Reset GPU core blocks */
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a6xx_gpu_sw_reset(gpu, true);
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@@ -1251,7 +1251,7 @@ static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)
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if (ret)
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goto force_off;
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a6xx_bus_clear_pending_transactions(adreno_gpu, a6xx_gpu->hung);
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adreno_gpu->funcs->bus_halt(adreno_gpu, a6xx_gpu->hung);
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/* tell the GMU we want to slumber */
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ret = a6xx_gmu_notify_slumber(gmu);
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@@ -1595,7 +1595,7 @@ static void a6xx_recover(struct msm_gpu *gpu)
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if (adreno_has_gmu_wrapper(adreno_gpu) || adreno_has_rgmu(adreno_gpu)) {
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/* Drain the outstanding traffic on memory buses */
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a6xx_bus_clear_pending_transactions(adreno_gpu, true);
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adreno_gpu->funcs->bus_halt(adreno_gpu, true);
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/* Reset the GPU to a clean state */
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a6xx_gpu_sw_reset(gpu, true);
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@@ -2316,7 +2316,7 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
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mutex_lock(&a6xx_gpu->gmu.lock);
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/* Drain the outstanding traffic on memory buses */
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a6xx_bus_clear_pending_transactions(adreno_gpu, true);
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adreno_gpu->funcs->bus_halt(adreno_gpu, true);
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if (adreno_is_a619_holi(adreno_gpu))
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a6xx_sptprac_disable(gmu);
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@@ -2685,6 +2685,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = {
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},
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.init = a6xx_gpu_init,
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.get_timestamp = a6xx_gmu_get_timestamp,
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.bus_halt = a6xx_bus_clear_pending_transactions,
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};
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const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
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@@ -2715,6 +2716,7 @@ const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
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},
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.init = a6xx_gpu_init,
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.get_timestamp = a6xx_get_timestamp,
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.bus_halt = a6xx_bus_clear_pending_transactions,
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};
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const struct adreno_gpu_funcs a7xx_gpu_funcs = {
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@@ -2747,4 +2749,5 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = {
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},
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.init = a6xx_gpu_init,
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.get_timestamp = a6xx_gmu_get_timestamp,
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.bus_halt = a6xx_bus_clear_pending_transactions,
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};
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@@ -77,6 +77,7 @@ struct adreno_gpu_funcs {
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struct msm_gpu_funcs base;
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struct msm_gpu *(*init)(struct drm_device *dev);
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int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
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void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off);
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};
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struct adreno_reglist {
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