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drm/i915/cx0: s/XELPDP_PORT_RESET_END_TIMEOUT/XELPDP_PORT_RESET_END_TIMEOUT_MS/

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Include the units the in the define name for XELPDP_PORT_RESET_END_TIMEOUT
to make it match all its other counterparts.

v2: It's _MS not _US (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251106155249.2810-1-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä
2025-11-06 17:52:49 +02:00
parent 2d41de2565
commit d4270f090d
2 changed files with 2 additions and 2 deletions
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2
drivers/gpu/drm/i915/display/intel_cx0_phy.c
View File

@@ -2926,7 +2926,7 @@ static void intel_cx0_phy_lane_reset(struct intel_encoder *encoder,
if (intel_de_wait_for_clear(display, XELPDP_PORT_BUF_CTL2(display, port),
lane_phy_current_status,
XELPDP_PORT_RESET_END_TIMEOUT))
XELPDP_PORT_RESET_END_TIMEOUT_MS))
drm_warn(display->drm,
"PHY %c failed to bring out of lane reset\n",
phy_name(phy));

2
drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
View File

@@ -80,7 +80,7 @@
#define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US 100
#define XELPDP_PORT_RESET_START_TIMEOUT_US 5
#define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS 2
#define XELPDP_PORT_RESET_END_TIMEOUT 15
#define XELPDP_PORT_RESET_END_TIMEOUT_MS 15
#define XELPDP_REFCLK_ENABLE_TIMEOUT_US 1
#define _XELPDP_PORT_BUF_CTL1_LN0_A 0x64004