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eeprom: at25: fram: Detect and support inside-out chip variants

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Infineon seems to be confused with the order ID bytes should be presented
by the FRAM chips and to be on the safe side they offer chips which are
either JEDEC conform or the full opposite of the latter.

Examples of the chips which present ID bytes in the reversed order are:
CY15B102QN
CY15B204QSN

Let's support them nevertheless. Except reversing the ID bytes, they also
have quite different density encoding even across EXCELON(tm) family.

The patch has been tested with the above two chips.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Link: https://lore.kernel.org/r/20250702222927.864875-1-alexander.sverdlin@siemens.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alexander Sverdlin
2025-07-03 00:29:26 +02:00
committed by Greg Kroah-Hartman
parent 239df3e4b4
commit cf4d2ce1ed
1 changed files with 19 additions and 3 deletions
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22
drivers/misc/eeprom/at25.c
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@@ -388,17 +388,33 @@ static int at25_fram_to_chip(struct device *dev, struct spi_eeprom *chip)
/* Get ID of chip */
fm25_aux_read(at25, id, FM25_RDID, FM25_ID_LEN);
/* There are inside-out FRAM variations, detect them and reverse the ID bytes */
if (id[6] == 0x7f && id[2] == 0xc2)
for (i = 0; i < ARRAY_SIZE(id) / 2; i++) {
u8 tmp = id[i];
int j = ARRAY_SIZE(id) - i - 1;
id[i] = id[j];
id[j] = tmp;
}
if (id[6] != 0xc2) {
dev_err(dev, "Error: no Cypress FRAM (id %02x)\n", id[6]);
return -ENODEV;
}
/* Set size found in ID */
if (id[7] < 0x21 || id[7] > 0x26) {
switch (id[7]) {
case 0x21 ... 0x26:
chip->byte_len = BIT(id[7] - 0x21 + 4) * 1024;
break;
case 0x2a ... 0x30:
/* CY15B116QN ... CY15B116QN */
chip->byte_len = BIT(((id[7] >> 1) & 0xf) + 13);
break;
default:
dev_err(dev, "Error: unsupported size (id %02x)\n", id[7]);
return -ENODEV;
}
chip->byte_len = BIT(id[7] - 0x21 + 4) * 1024;
if (chip->byte_len > 64 * 1024)
chip->flags |= EE_ADDR3;
else