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Merge tag 'qcom-arm64-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Browse Source 
Qualcomm Arm64 DeviceTree updates for v6.19

Introduce support for the Redxa Dragon Q6A development board, the Huawei
MateBoot E 2019, the Asus ZenFone 2 Laser/Selfie, the MSM8937 platform
and the Xiaomo Redmi 3S device based on it.

SoC dtsi files for Agatti, Hamoa, Kodiak, Monaco, Purwa, and Talos, are
renamed in order to better facilitate the addition of new boards on the
various SKUs of these.

Cooling maps are introduced for the CPU cores in IPQ5424, and the
network subsystem clock controller is added.

On Lemans, RTC is enabled, the EVK fan controller is described and a
camera mezzanine overlay is introduced.

Touchscreen support is added to the BQ Aquaris M5, and the touchscreen
from Samsung Galaxy Core Prime is moved to the common platform to
benefit the other devices sharing common definitions.

On Agatti two more UARTs are described, as well as APR and the related audio
services, and the LPASS LPI pin controller. The RB1 board gets HDMI
autio playback support.

On Kodiak-based targets, Fairphone FP5 gains definitions of the UW camera
actuator, regulator for the ToF sensor, and haptic module. The SHIFT
SHIFTphone 8 gains RGB and flash LEDs, and Venus support. The Rb3Gen2
development board gets QUP firmware path defined, to support dynamic
loading of the serial engine firmware. Kodiak also gains Coresight
devices for AOSS and QDSS blocks.

Display support is added for the Talos platform, and enabled on the Ride
board. Talos also gains the definitions to scale DDR and L3
interconnects.

On SC8280XP, the camera privacy indicator on Lenovo Thinkpad X13s is
connected to the camera stack. Off-by-one GPI DMA channels are
corrected.

The SDM845-based LG and OnePlus custom defined rmtfs guard pages are
replaced with the inline-support for guard pages.

SDX75 DWC3 node is flattened and marked for USB role switching.

On SM8550, the camera subsystem and the S5K3M5 camera sensor is
introduced for the QRD, and an overlay for the "Rear Camera Card" for
the Hardware Development Kit (HDK) is introduced.

USB support is introduce for the SM8750 platform, and enabled in the MTP
and QRD devices.

On Hamoa, like on other devices the Asus Zenbook A14 definition of the
eDP panel is reworked to support both LCD and OLED configurations. WiFi
and Bluetooth is also enabled on the A14. The CRD gains support for
controlling charge limits.

The refgen regulator supplying DSI is defined and wired up on a variety
of platforms.

* tag 'qcom-arm64-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (138 commits)
  arm64: dts: qcom: sdx75: Add missing usb-role-switch property
  arm64: dts: qcom: sdx75: Flatten usb controller node
  arm64: dts: qcom: HAMOA-IOT-SOM: Unreserve GPIOs blocking SPI11 access
  arm64: dts: qcom: qrb2210-rb1: Fix UART3 wakeup IRQ storm
  Revert "arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature"
  arm64: dts: qcom: kodiak: add coresight nodes
  arm64: dts: qcom: sdm845-oneplus: Describe TE gpio
  arm64: dts: qcom: sdm845-oneplus: Implement panel sleep pinctrl
  arm64: dts: qcom: sdm845-oneplus: Group panel pinctrl
  arm64: dts: qcom: sdm845-oneplus: Update compatbible and add DDIC supplies
  arm64: dts: qcom: qcs6490-rb3gen2: Rename vph-pwr regulator node
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add UW cam actuator
  arm64: dts: qcom: qcm6490-fairphone-fp5: Enable CCI pull-up
  arm64: dts: qcom: sm8750: Add USB support for SM8750 QRD platform
  arm64: dts: qcom: sm8750: Add USB support for SM8750 MTP platform
  arm64: dts: qcom: sm8750: Add USB support to SM8750 SoCs
  arm64: dts: qcom: rename x1p42100 to purwa
  arm64: dts: qcom: rename sc7280 to kodiak
  arm64: dts: qcom: rename qcm2290 to agatti
  arm64: dts: qcom: add gpu_zap_shader label
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-11-21 17:24:41 +01:00
parent c02dce25bc f481e772e0
commit c1ce3348ae
138 changed files with 8557 additions and 948 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@@ -88,6 +88,7 @@ properties:
- items:
- enum:
- asus,z00t
- huawei,kiwi
- longcheer,l9100
- samsung,a7
@@ -191,6 +192,11 @@ properties:
- xiaomi,riva
- const: qcom,msm8917
- items:
- enum:
- xiaomi,land
- const: qcom,msm8937
- items:
- enum:
- flipkart,rimob
@@ -340,6 +346,7 @@ properties:
- particle,tachyon
- qcom,qcm6490-idp
- qcom,qcs6490-rb3gen2
- radxa,dragon-q6a
- shift,otter
- const: qcom,qcm6490
@@ -893,6 +900,7 @@ properties:
- items:
- enum:
- huawei,planck
- lenovo,yoga-c630
- lg,judyln
- lg,judyp
@@ -1083,7 +1091,13 @@ properties:
- items:
- enum:
- asus,zenbook-a14-ux3407qa
- asus,zenbook-a14-ux3407qa-lcd
- asus,zenbook-a14-ux3407qa-oled
- const: asus,zenbook-a14-ux3407qa
- const: qcom,x1p42100
- items:
- enum:
- hp,omnibook-x14-fe1
- lenovo,thinkbook-16
- qcom,x1p42100-crd
@@ -1167,6 +1181,7 @@ allOf:
- qcom,apq8094
- qcom,apq8096
- qcom,msm8917
- qcom,msm8937
- qcom,msm8939
- qcom,msm8953
- qcom,msm8956

63
Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
View File

@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574
title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574 and IPQ5424
maintainers:
- Bjorn Andersson <andersson@kernel.org>
@@ -12,21 +12,29 @@ maintainers:
description: |
Qualcomm networking sub system clock control module provides the clocks,
resets on IPQ9574
resets on IPQ9574 and IPQ5424
See also::
See also:
include/dt-bindings/clock/qcom,ipq5424-nsscc.h
include/dt-bindings/clock/qcom,ipq9574-nsscc.h
include/dt-bindings/reset/qcom,ipq5424-nsscc.h
include/dt-bindings/reset/qcom,ipq9574-nsscc.h
properties:
compatible:
const: qcom,ipq9574-nsscc
enum:
- qcom,ipq5424-nsscc
- qcom,ipq9574-nsscc
clocks:
items:
- description: Board XO source
- description: CMN_PLL NSS 1200MHz (Bias PLL cc) clock source
- description: CMN_PLL PPE 353MHz (Bias PLL ubi nc) clock source
- description: CMN_PLL NSS (Bias PLL cc) clock source. This clock rate
can vary for different IPQ SoCs. For example, it is 1200 MHz on the
IPQ9574 and 300 MHz on the IPQ5424.
- description: CMN_PLL PPE (Bias PLL ubi nc) clock source. The clock
rate can vary for different IPQ SoCs. For example, it is 353 MHz
on the IPQ9574 and 375 MHz on the IPQ5424.
- description: GCC GPLL0 OUT AUX clock source
- description: Uniphy0 NSS Rx clock source
- description: Uniphy0 NSS Tx clock source
@@ -42,8 +50,12 @@ properties:
clock-names:
items:
- const: xo
- const: nss_1200
- const: ppe_353
- enum:
- nss_1200
- nss
- enum:
- ppe_353
- ppe
- const: gpll0_out
- const: uniphy0_rx
- const: uniphy0_tx
@@ -60,6 +72,40 @@ required:
allOf:
- $ref: qcom,gcc.yaml#
- if:
properties:
compatible:
const: qcom,ipq9574-nsscc
then:
properties:
clock-names:
items:
- const: xo
- const: nss_1200
- const: ppe_353
- const: gpll0_out
- const: uniphy0_rx
- const: uniphy0_tx
- const: uniphy1_rx
- const: uniphy1_tx
- const: uniphy2_rx
- const: uniphy2_tx
- const: bus
else:
properties:
clock-names:
items:
- const: xo
- const: nss
- const: ppe
- const: gpll0_out
- const: uniphy0_rx
- const: uniphy0_tx
- const: uniphy1_rx
- const: uniphy1_tx
- const: uniphy2_rx
- const: uniphy2_tx
- const: bus
unevaluatedProperties: false
@@ -94,5 +140,6 @@ examples:
"bus";
#clock-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
...

62
Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml
View File

@@ -32,9 +32,36 @@ properties:
- description: PCIe 5 pipe clock
- description: PCIe 6a pipe clock
- description: PCIe 6b pipe clock
- description: USB QMP Phy 0 clock source
- description: USB QMP Phy 1 clock source
- description: USB QMP Phy 2 clock source
- description: USB4_0 QMPPHY clock source
- description: USB4_1 QMPPHY clock source
- description: USB4_2 QMPPHY clock source
- description: USB4_0 PHY DP0 GMUX clock source
- description: USB4_0 PHY DP1 GMUX clock source
- description: USB4_0 PHY PCIE PIPEGMUX clock source
- description: USB4_0 PHY PIPEGMUX clock source
- description: USB4_0 PHY SYS PCIE PIPEGMUX clock source
- description: USB4_1 PHY DP0 GMUX 2 clock source
- description: USB4_1 PHY DP1 GMUX 2 clock source
- description: USB4_1 PHY PCIE PIPEGMUX clock source
- description: USB4_1 PHY PIPEGMUX clock source
- description: USB4_1 PHY SYS PCIE PIPEGMUX clock source
- description: USB4_2 PHY DP0 GMUX 2 clock source
- description: USB4_2 PHY DP1 GMUX 2 clock source
- description: USB4_2 PHY PCIE PIPEGMUX clock source
- description: USB4_2 PHY PIPEGMUX clock source
- description: USB4_2 PHY SYS PCIE PIPEGMUX clock source
- description: USB4_0 PHY RX 0 clock source
- description: USB4_0 PHY RX 1 clock source
- description: USB4_1 PHY RX 0 clock source
- description: USB4_1 PHY RX 1 clock source
- description: USB4_2 PHY RX 0 clock source
- description: USB4_2 PHY RX 1 clock source
- description: USB4_0 PHY PCIE PIPE clock source
- description: USB4_0 PHY max PIPE clock source
- description: USB4_1 PHY PCIE PIPE clock source
- description: USB4_1 PHY max PIPE clock source
- description: USB4_2 PHY PCIE PIPE clock source
- description: USB4_2 PHY max PIPE clock source
power-domains:
description:
@@ -67,7 +94,34 @@ examples:
<&pcie6b_phy>,
<&usb_1_ss0_qmpphy 0>,
<&usb_1_ss1_qmpphy 1>,
<&usb_1_ss2_qmpphy 2>;
<&usb_1_ss2_qmpphy 2>,
<&usb4_0_phy_dp0_gmux_clk>,
<&usb4_0_phy_dp1_gmux_clk>,
<&usb4_0_phy_pcie_pipegmux_clk>,
<&usb4_0_phy_pipegmux_clk>,
<&usb4_0_phy_sys_pcie_pipegmux_clk>,
<&usb4_1_phy_dp0_gmux_2_clk>,
<&usb4_1_phy_dp1_gmux_2_clk>,
<&usb4_1_phy_pcie_pipegmux_clk>,
<&usb4_1_phy_pipegmux_clk>,
<&usb4_1_phy_sys_pcie_pipegmux_clk>,
<&usb4_2_phy_dp0_gmux_2_clk>,
<&usb4_2_phy_dp1_gmux_2_clk>,
<&usb4_2_phy_pcie_pipegmux_clk>,
<&usb4_2_phy_pipegmux_clk>,
<&usb4_2_phy_sys_pcie_pipegmux_clk>,
<&usb4_0_phy_rx_0_clk>,
<&usb4_0_phy_rx_1_clk>,
<&usb4_1_phy_rx_0_clk>,
<&usb4_1_phy_rx_1_clk>,
<&usb4_2_phy_rx_0_clk>,
<&usb4_2_phy_rx_1_clk>,
<&usb4_0_phy_pcie_pipe_clk>,
<&usb4_0_phy_max_pipe_clk>,
<&usb4_1_phy_pcie_pipe_clk>,
<&usb4_1_phy_max_pipe_clk>,
<&usb4_2_phy_pcie_pipe_clk>,
<&usb4_2_phy_max_pipe_clk>;
power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
#reset-cells = <1>;

12
arch/arm64/boot/dts/qcom/Makefile
View File

@@ -33,8 +33,10 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp454.dtb
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb
lemans-evk-camera-csi1-imx577-dtbs := lemans-evk.dtb lemans-evk-camera-csi1-imx577.dtbo
lemans-evk-camera-dtbs := lemans-evk.dtb lemans-evk-camera.dtbo
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera-csi1-imx577.dtb
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera.dtb
dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
@@ -72,6 +74,8 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-wingtech-wt88047.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-yiming-uz801v3.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8917-xiaomi-riva.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8929-wingtech-wt82918hd.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8937-xiaomi-land.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-asus-z00t.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-huawei-kiwi.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-longcheer-l9100.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-samsung-a7.dtb
@@ -126,6 +130,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs615-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-radxa-dragon-q6a.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo
@@ -258,6 +263,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium-ebbg.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium-tianma.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-polaris.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-huawei-matebook-e-2019.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdx75-idp.dtb
@@ -298,6 +304,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-samsung-r0q.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx223.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb
sm8550-hdk-rear-camera-card-dtbs := sm8550-hdk.dtb sm8550-hdk-rear-camera-card.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk-rear-camera-card.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb
@@ -344,6 +354,8 @@ x1e80100-qcp-el2-dtbs := x1e80100-qcp.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb x1e80100-qcp-el2.dtb
x1p42100-asus-zenbook-a14-el2-dtbs := x1p42100-asus-zenbook-a14.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1p42100-asus-zenbook-a14.dtb x1p42100-asus-zenbook-a14-el2.dtb
x1p42100-asus-zenbook-a14-lcd-el2-dtbs := x1p42100-asus-zenbook-a14-lcd.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1p42100-asus-zenbook-a14-lcd.dtb x1p42100-asus-zenbook-a14-lcd-el2.dtb
x1p42100-crd-el2-dtbs := x1p42100-crd.dtb x1-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += x1p42100-crd.dtb x1p42100-crd-el2.dtb
x1p42100-hp-omnibook-x14-el2-dtbs := x1p42100-hp-omnibook-x14.dtb x1-el2.dtbo

172
arch/arm64/boot/dts/qcom/qcm2290.dtsi → arch/arm64/boot/dts/qcom/agatti.dtsi
View File

@@ -17,6 +17,9 @@
#include <dt-bindings/interconnect/qcom,qcm2290.h>
#include <dt-bindings/interconnect/qcom,rpm-icc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
/ {
interrupt-parent = <&intc>;
@@ -552,6 +555,13 @@
bias-disable;
};
qup_uart1_default: qup-uart1-default-state {
pins = "gpio4", "gpio5", "gpio69", "gpio70";
function = "qup1";
drive-strength = <2>;
bias-disable;
};
qup_uart3_default: qup-uart3-default-state {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qup3";
@@ -566,6 +576,13 @@
bias-disable;
};
qup_uart5_default: qup-uart5-default-state {
pins = "gpio14", "gpio15", "gpio16", "gpio17";
function = "qup5";
drive-strength = <2>;
bias-disable;
};
cci0_default: cci0-default-state {
pins = "gpio22", "gpio23";
function = "cci_i2c";
@@ -671,6 +688,43 @@
};
};
lpass_tlmm: pinctrl@a7c0000 {
compatible = "qcom,qcm2290-lpass-lpi-pinctrl",
"qcom,sm6115-lpass-lpi-pinctrl";
reg = <0x0 0x0a7c0000 0x0 0x20000>,
<0x0 0x0a950000 0x0 0x10000>;
clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "audio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 19>;
lpi_i2s2_active: lpi-i2s2-active-state {
sck-pins {
pins = "gpio10";
function = "i2s2_clk";
bias-disable;
drive-strength = <8>;
};
ws-pins {
pins = "gpio11";
function = "i2s2_ws";
bias-disable;
drive-strength = <8>;
};
data-pins {
pins = "gpio12";
function = "i2s2_data";
bias-disable;
drive-strength = <8>;
};
};
};
gcc: clock-controller@1400000 {
compatible = "qcom,gcc-qcm2290";
reg = <0x0 0x01400000 0x0 0x1f0000>;
@@ -1197,6 +1251,23 @@
status = "disabled";
};
uart1: serial@4a84000 {
compatible = "qcom,geni-uart";
reg = <0x0 0x04a84000 0x0 0x4000>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
clock-names = "se";
pinctrl-0 = <&qup_uart1_default>;
pinctrl-names = "default";
interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
&qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
<&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
interconnect-names = "qup-core",
"qup-config";
status = "disabled";
};
i2c2: i2c@4a88000 {
compatible = "qcom,geni-i2c";
reg = <0x0 0x04a88000 0x0 0x4000>;
@@ -1302,7 +1373,7 @@
interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
&qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
<&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
&config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
interconnect-names = "qup-core",
"qup-config";
status = "disabled";
@@ -1418,6 +1489,23 @@
#size-cells = <0>;
status = "disabled";
};
uart5: serial@4a94000 {
compatible = "qcom,geni-uart";
reg = <0x0 0x04a94000 0x0 0x4000>;
interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
clock-names = "se";
pinctrl-0 = <&qup_uart5_default>;
pinctrl-names = "default";
interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
&qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
<&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
&config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
interconnect-names = "qup-core",
"qup-config";
status = "disabled";
};
};
usb: usb@4ef8800 {
@@ -1537,7 +1625,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};
@@ -1685,25 +1773,25 @@
};
};
camss: camss@5c6e000 {
camss: camss@5c11000 {
compatible = "qcom,qcm2290-camss";
reg = <0x0 0x5c6e000 0x0 0x1000>,
reg = <0x0 0x5c11000 0x0 0x1000>,
<0x0 0x5c6e000 0x0 0x1000>,
<0x0 0x5c75000 0x0 0x1000>,
<0x0 0x5c52000 0x0 0x1000>,
<0x0 0x5c53000 0x0 0x1000>,
<0x0 0x5c66000 0x0 0x400>,
<0x0 0x5c68000 0x0 0x400>,
<0x0 0x5c11000 0x0 0x1000>,
<0x0 0x5c6f000 0x0 0x4000>,
<0x0 0x5c76000 0x0 0x4000>;
reg-names = "csid0",
reg-names = "top",
"csid0",
"csid1",
"csiphy0",
"csiphy1",
"csitpg0",
"csitpg1",
"top",
"vfe0",
"vfe1";
@@ -2077,6 +2165,76 @@
label = "lpass";
qcom,remote-pid = <2>;
mboxes = <&apcs_glb 8>;
apr {
compatible = "qcom,apr-v2";
qcom,glink-channels = "apr_audio_svc";
qcom,domain = <APR_DOMAIN_ADSP>;
#address-cells = <1>;
#size-cells = <0>;
service@3 {
reg = <APR_SVC_ADSP_CORE>;
compatible = "qcom,q6core";
qcom,protection-domain = "avs/audio",
"msm/adsp/audio_pd";
};
q6afe: service@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;
qcom,protection-domain = "avs/audio",
"msm/adsp/audio_pd";
q6afedai: dais {
compatible = "qcom,q6afe-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
};
q6afecc: clock-controller {
compatible = "qcom,q6afe-clocks";
#clock-cells = <2>;
};
};
q6asm: service@7 {
compatible = "qcom,q6asm";
reg = <APR_SVC_ASM>;
qcom,protection-domain = "avs/audio",
"msm/adsp/audio_pd";
q6asmdai: dais {
compatible = "qcom,q6asm-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
iommus = <&apps_smmu 0x1c1 0x0>;
dai@0 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
};
q6adm: service@8 {
compatible = "qcom,q6adm";
reg = <APR_SVC_ADM>;
qcom,protection-domain = "avs/audio",
"msm/adsp/audio_pd";
q6routing: routing {
compatible = "qcom,q6adm-routing";
#sound-dai-cells = <0>;
};
};
};
};
};

4
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View File

@@ -203,6 +203,10 @@
status = "okay";
};
&gpu_zap_shader {
firmware-name = "qcom/apq8096/a530_zap.mbn";
};
&hsusb_phy1 {
status = "okay";

38
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
View File

@@ -743,20 +743,32 @@
};
&lpass_tlmm {
spkr_01_sd_n_active: spkr-01-sd-n-active-state {
spkr_0_sd_n_active: spkr-0-sd-n-active-state {
pins = "gpio12";
function = "gpio";
drive-strength = <16>;
bias-disable;
output-low;
};
spkr_23_sd_n_active: spkr-23-sd-n-active-state {
spkr_1_sd_n_active: spkr-1-sd-n-active-state {
pins = "gpio13";
function = "gpio";
drive-strength = <16>;
bias-disable;
output-low;
};
spkr_2_sd_n_active: spkr-2-sd-n-active-state {
pins = "gpio17";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
spkr_3_sd_n_active: spkr-3-sd-n-active-state {
pins = "gpio18";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
};
@@ -908,12 +920,14 @@
&swr0 {
status = "okay";
pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
pinctrl-0 = <&wsa_swr_active>;
pinctrl-names = "default";
/* WSA8845, Left Woofer */
left_woofer: speaker@0,0 {
compatible = "sdw20217020400";
pinctrl-0 = <&spkr_0_sd_n_active>;
pinctrl-names = "default";
reg = <0 0>;
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
@@ -926,8 +940,10 @@
/* WSA8845, Left Tweeter */
left_tweeter: speaker@0,1 {
compatible = "sdw20217020400";
pinctrl-0 = <&spkr_1_sd_n_active>;
pinctrl-names = "default";
reg = <0 1>;
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "TweeterLeft";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -961,14 +977,16 @@
&swr3 {
status = "okay";
pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
pinctrl-0 = <&wsa2_swr_active>;
pinctrl-names = "default";
/* WSA8845, Right Woofer */
right_woofer: speaker@0,0 {
compatible = "sdw20217020400";
pinctrl-0 = <&spkr_2_sd_n_active>;
pinctrl-names = "default";
reg = <0 0>;
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 17 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "WooferRight";
vdd-1p8-supply = <&vreg_l15b_1p8>;
@@ -979,8 +997,10 @@
/* WSA8845, Right Tweeter */
right_tweeter: speaker@0,1 {
compatible = "sdw20217020400";
pinctrl-0 = <&spkr_3_sd_n_active>;
pinctrl-names = "default";
reg = <0 1>;
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
reset-gpios = <&lpass_tlmm 18 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
sound-name-prefix = "TweeterRight";
vdd-1p8-supply = <&vreg_l15b_1p8>;

7
arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
View File

@@ -3,8 +3,8 @@
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include "x1e80100.dtsi"
#include "x1e80100-pmics.dtsi"
#include "hamoa.dtsi"
#include "hamoa-pmics.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
@@ -451,8 +451,7 @@
};
&tlmm {
gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
<44 4>; /* SPI (TPM) */
gpio-reserved-ranges = <34 2>; /* TPM LP & INT */
pcie4_default: pcie4-default-state {
clkreq-n-pins {

20
arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi → arch/arm64/boot/dts/qcom/hamoa-pmics.dtsi
View File

@@ -240,6 +240,26 @@
};
};
pmk8550_sdam_15: nvram@7e00 {
compatible = "qcom,spmi-sdam";
reg = <0x7e00>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x7e00 0x100>;
charge_limit_en: charge-limit-en@73 {
reg = <0x73 0x1>;
};
charge_limit_end: charge-limit-end@75 {
reg = <0x75 0x1>;
};
charge_limit_delta: charge-limit-delta@76 {
reg = <0x76 0x1>;
};
};
pmk8550_gpios: gpio@8800 {
compatible = "qcom,pmk8550-gpio", "qcom,spmi-gpio";
reg = <0xb800>;

171
arch/arm64/boot/dts/qcom/x1e80100.dtsi → arch/arm64/boot/dts/qcom/hamoa.dtsi
View File

@@ -75,7 +75,6 @@
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_0: l2-cache {
compatible = "cache";
@@ -92,7 +91,6 @@
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu2: cpu@200 {
@@ -103,7 +101,6 @@
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu3: cpu@300 {
@@ -114,7 +111,6 @@
next-level-cache = <&l2_0>;
power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu4: cpu@10000 {
@@ -125,7 +121,6 @@
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd4>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_1: l2-cache {
compatible = "cache";
@@ -142,7 +137,6 @@
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd5>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu6: cpu@10200 {
@@ -153,7 +147,6 @@
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu7: cpu@10300 {
@@ -164,7 +157,6 @@
next-level-cache = <&l2_1>;
power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu8: cpu@20000 {
@@ -175,7 +167,6 @@
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd8>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
l2_2: l2-cache {
compatible = "cache";
@@ -192,7 +183,6 @@
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd9>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu10: cpu@20200 {
@@ -203,7 +193,6 @@
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd10>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu11: cpu@20300 {
@@ -214,7 +203,6 @@
next-level-cache = <&l2_2>;
power-domains = <&cpu_pd11>, <&scmi_dvfs 2>;
power-domain-names = "psci", "perf";
cpu-idle-states = <&cluster_c4>;
};
cpu-map {
@@ -371,61 +359,73 @@
cpu_pd0: power-domain-cpu0 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd0>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd0>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd0>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd3: power-domain-cpu3 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd0>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd4: power-domain-cpu4 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd1>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd5: power-domain-cpu5 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd1>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd6: power-domain-cpu6 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd1>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd7: power-domain-cpu7 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd1>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd8: power-domain-cpu8 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd2>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd9: power-domain-cpu9 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd2>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd10: power-domain-cpu10 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd2>;
domain-idle-states = <&cluster_c4>;
};
cpu_pd11: power-domain-cpu11 {
#power-domain-cells = <0>;
power-domains = <&cluster_pd2>;
domain-idle-states = <&cluster_c4>;
};
cluster_pd0: power-domain-cpu-cluster0 {
@@ -807,7 +807,34 @@
<0>,
<&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
<&usb_1_ss1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
<&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
<&usb_1_ss2_qmpphy QMP_USB43DP_USB3_PIPE_CLK>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>;
power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
@@ -3240,74 +3267,132 @@
pcie3_opp_table: opp-table {
compatible = "operating-points-v2";
/* GEN 1 x1 */
opp-2500000 {
/* 2.5GT/s x1 */
opp-2500000-1 {
opp-hz = /bits/ 64 <2500000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <250000 1>;
opp-level = <1>;
};
/* GEN 1 x2 and GEN 2 x1 */
opp-5000000 {
/* 2.5 GT/s x2 */
opp-5000000-1 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
opp-level = <1>;
};
/* GEN 1 x4 and GEN 2 x2 */
opp-10000000 {
/* 2.5 GT/s x4 */
opp-10000000-1 {
opp-hz = /bits/ 64 <10000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <1000000 1>;
opp-level = <1>;
};
/* GEN 1 x8 and GEN 2 x4 */
opp-20000000 {
/* 2.5 GT/s x8 */
opp-20000000-1 {
opp-hz = /bits/ 64 <20000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <2000000 1>;
opp-level = <1>;
};
/* GEN 2 x8 */
opp-40000000 {
/* 5 GT/s x1 */
opp-5000000-2 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
opp-level = <2>;
};
/* 5 GT/s x2 */
opp-10000000-2 {
opp-hz = /bits/ 64 <10000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <1000000 1>;
opp-level = <2>;
};
/* 5 GT/s x4 */
opp-20000000-2 {
opp-hz = /bits/ 64 <20000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <2000000 1>;
opp-level = <2>;
};
/* 5 GT/s x8 */
opp-40000000-2 {
opp-hz = /bits/ 64 <40000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <4000000 1>;
opp-level = <2>;
};
/* GEN 3 x1 */
opp-8000000 {
/* 8 GT/s x1 */
opp-8000000-3 {
opp-hz = /bits/ 64 <8000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <984500 1>;
opp-level = <3>;
};
/* GEN 3 x2 and GEN 4 x1 */
opp-16000000 {
/* 8 GT/s x2 */
opp-16000000-3 {
opp-hz = /bits/ 64 <16000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <1969000 1>;
opp-level = <3>;
};
/* GEN 3 x4 and GEN 4 x2 */
opp-32000000 {
/* 8 GT/s x4 */
opp-32000000-3 {
opp-hz = /bits/ 64 <32000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <3938000 1>;
opp-level = <3>;
};
/* GEN 3 x8 and GEN 4 x4 */
opp-64000000 {
/* 8 GT/s x8 */
opp-64000000-3 {
opp-hz = /bits/ 64 <64000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <7876000 1>;
opp-level = <3>;
};
/* GEN 4 x8 */
opp-128000000 {
/* 16 GT/s x1 */
opp-16000000-4 {
opp-hz = /bits/ 64 <16000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <1969000 1>;
opp-level = <4>;
};
/* 16 GT/s x2 */
opp-32000000-4 {
opp-hz = /bits/ 64 <32000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <3938000 1>;
opp-level = <4>;
};
/* 16 GT/s x4 */
opp-64000000-4 {
opp-hz = /bits/ 64 <64000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <7876000 1>;
opp-level = <4>;
};
/* 16 GT/s x8 */
opp-128000000-4 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <15753000 1>;
opp-level = <4>;
};
};
@@ -4922,6 +5007,7 @@
interconnect-names = "usb-ddr",
"apps-usb";
qcom,select-utmi-as-pipe-clk;
wakeup-source;
status = "disabled";
@@ -4939,15 +5025,8 @@
dma-coherent;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_2_dwc3_hs: endpoint {
};
port {
usb_2_dwc3_hs: endpoint {
};
};
};
@@ -5466,7 +5545,7 @@
compatible = "qcom,x1e80100-dp";
reg = <0 0x0ae90000 0 0x200>,
<0 0x0ae90200 0 0x200>,
<0 0x0ae90400 0 0x600>,
<0 0x0ae90400 0 0xc00>,
<0 0x0ae91000 0 0x400>,
<0 0x0ae91400 0 0x400>;
@@ -5554,7 +5633,7 @@
compatible = "qcom,x1e80100-dp";
reg = <0 0x0ae98000 0 0x200>,
<0 0x0ae98200 0 0x200>,
<0 0x0ae98400 0 0x600>,
<0 0x0ae98400 0 0xc00>,
<0 0x0ae99000 0 0x400>,
<0 0x0ae99400 0 0x400>;
@@ -5642,7 +5721,7 @@
compatible = "qcom,x1e80100-dp";
reg = <0 0x0ae9a000 0 0x200>,
<0 0x0ae9a200 0 0x200>,
<0 0x0ae9a400 0 0x600>,
<0 0x0ae9a400 0 0xc00>,
<0 0x0ae9b000 0 0x400>,
<0 0x0ae9b400 0 0x400>;
@@ -5729,7 +5808,7 @@
compatible = "qcom,x1e80100-dp";
reg = <0 0x0aea0000 0 0x200>,
<0 0x0aea0200 0 0x200>,
<0 0x0aea0400 0 0x600>,
<0 0x0aea0400 0 0xc00>,
<0 0x0aea1000 0 0x400>,
<0 0x0aea1400 0 0x400>;

95
arch/arm64/boot/dts/qcom/ipq5424.dtsi
View File

@@ -3,7 +3,7 @@
* IPQ5424 device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/qcom,ipq5424-gcc.h>
#include <dt-bindings/interconnect/qcom,ipq5424.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/thermal/thermal.h>
/ {
#address-cells = <2>;
@@ -57,6 +58,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
#cooling-cells = <2>;
l2_0: l2-cache {
compatible = "cache";
@@ -82,6 +84,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
#cooling-cells = <2>;
l2_100: l2-cache {
compatible = "cache";
@@ -101,6 +104,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
#cooling-cells = <2>;
l2_200: l2-cache {
compatible = "cache";
@@ -120,6 +124,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
#cooling-cells = <2>;
l2_300: l2-cache {
compatible = "cache";
@@ -213,7 +218,7 @@
};
tfa@8a832000 {
reg = <0x0 0x8a832000 0x0 0x7d000>;
reg = <0x0 0x8a832000 0x0 0x80000>;
no-map;
status = "disabled";
};
@@ -815,6 +820,36 @@
#interconnect-cells = <1>;
};
clock-controller@39b00000 {
compatible = "qcom,ipq5424-nsscc";
reg = <0 0x39b00000 0 0x100000>;
clocks = <&cmn_pll IPQ5424_XO_24MHZ_CLK>,
<&cmn_pll IPQ5424_NSS_300MHZ_CLK>,
<&cmn_pll IPQ5424_PPE_375MHZ_CLK>,
<&gcc GPLL0_OUT_AUX>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<&gcc GCC_NSSCC_CLK>;
clock-names = "xo",
"nss",
"ppe",
"gpll0_out",
"uniphy0_rx",
"uniphy0_tx",
"uniphy1_rx",
"uniphy1_tx",
"uniphy2_rx",
"uniphy2_tx",
"bus";
#clock-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
pcie3: pcie@40000000 {
compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";
reg = <0x0 0x40000000 0x0 0xf1c>,
@@ -1235,18 +1270,28 @@
thermal-sensors = <&tsens 14>;
trips {
cpu-critical {
cpu0_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
cpu0_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu0_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu1-thermal {
@@ -1254,18 +1299,28 @@
thermal-sensors = <&tsens 12>;
trips {
cpu-critical {
cpu1_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
cpu1_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu1_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu2-thermal {
@@ -1273,18 +1328,28 @@
thermal-sensors = <&tsens 11>;
trips {
cpu-critical {
cpu2_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
cpu2_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu2_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu3-thermal {
@@ -1292,18 +1357,28 @@
thermal-sensors = <&tsens 13>;
trips {
cpu-critical {
cpu3_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
cpu-passive {
cpu3_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu3_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
wcss-tile2-thermal {

300
arch/arm64/boot/dts/qcom/sc7280.dtsi → arch/arm64/boot/dts/qcom/kodiak.dtsi
View File

@@ -3338,6 +3338,86 @@
};
};
tpda@6004000 {
compatible = "qcom,coresight-tpda", "arm,primecell";
reg = <0x0 0x06004000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1c {
reg = <0x1c>;
qdss_tpda_in28: endpoint {
remote-endpoint = <&spdm_tpdm_out>;
};
};
};
out-ports {
port {
qdss_tpda_out: endpoint {
remote-endpoint = <&qdss_dl_funnel_in0>;
};
};
};
};
funnel@6005000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x0 0x06005000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
port {
qdss_dl_funnel_in0: endpoint {
remote-endpoint = <&qdss_tpda_out>;
};
};
};
out-ports {
port {
qdss_dl_funnel_out: endpoint {
remote-endpoint = <&funnel0_in6>;
};
};
};
};
tpdm@600f000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x0600f000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,cmb-element-bits = <32>;
qcom,cmb-msrs-num = <32>;
out-ports {
port {
spdm_tpdm_out: endpoint {
remote-endpoint = <&qdss_tpda_in28>;
};
};
};
};
cti@6010000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06010000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
funnel@6041000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x06041000 0 0x1000>;
@@ -3357,6 +3437,14 @@
#address-cells = <1>;
#size-cells = <0>;
port@6 {
reg = <6>;
funnel0_in6: endpoint {
remote-endpoint = <&qdss_dl_funnel_out>;
};
};
port@7 {
reg = <7>;
funnel0_in7: endpoint {
@@ -3471,6 +3559,38 @@
};
};
cti@6b00000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06b00000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
cti@6b01000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06b01000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
cti@6b02000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06b02000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
cti@6b03000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06b03000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
funnel@6b04000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x06b04000 0 0x1000>;
@@ -3490,6 +3610,14 @@
#address-cells = <1>;
#size-cells = <0>;
port@6 {
reg = <6>;
swao_funnel_in6: endpoint {
remote-endpoint = <&aoss_tpda_out>;
};
};
port@7 {
reg = <7>;
swao_funnel_in: endpoint {
@@ -3548,6 +3676,170 @@
};
};
tpda@6b08000 {
compatible = "qcom,coresight-tpda", "arm,primecell";
reg = <0x0 0x06b08000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
aoss_tpda_in0: endpoint {
remote-endpoint = <&swao_prio0_tpdm_out>;
};
};
port@1 {
reg = <1>;
aoss_tpda_in1: endpoint {
remote-endpoint = <&swao_prio1_tpdm_out>;
};
};
port@2 {
reg = <2>;
aoss_tpda_in2: endpoint {
remote-endpoint = <&swao_prio2_tpdm_out>;
};
};
port@3 {
reg = <3>;
aoss_tpda_in3: endpoint {
remote-endpoint = <&swao_prio3_tpdm_out>;
};
};
port@4 {
reg = <4>;
aoss_tpda_in4: endpoint {
remote-endpoint = <&swao_tpdm_out>;
};
};
};
out-ports {
port {
aoss_tpda_out: endpoint {
remote-endpoint = <&swao_funnel_in6>;
};
};
};
};
tpdm@6b09000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x06b09000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,cmb-element-bits = <64>;
qcom,cmb-msrs-num = <32>;
out-ports {
port {
swao_prio0_tpdm_out: endpoint {
remote-endpoint = <&aoss_tpda_in0>;
};
};
};
};
tpdm@6b0a000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x06b0a000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,cmb-element-bits = <64>;
qcom,cmb-msrs-num = <32>;
out-ports {
port {
swao_prio1_tpdm_out: endpoint {
remote-endpoint = <&aoss_tpda_in1>;
};
};
};
};
tpdm@6b0b000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x06b0b000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,cmb-element-bits = <64>;
qcom,cmb-msrs-num = <32>;
out-ports {
port {
swao_prio2_tpdm_out: endpoint {
remote-endpoint = <&aoss_tpda_in2>;
};
};
};
};
tpdm@6b0c000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x06b0c000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,cmb-element-bits = <64>;
qcom,cmb-msrs-num = <32>;
out-ports {
port {
swao_prio3_tpdm_out: endpoint {
remote-endpoint = <&aoss_tpda_in3>;
};
};
};
};
tpdm@6b0d000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x06b0d000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
qcom,dsb-element-bits = <32>;
qcom,dsb-msrs-num = <32>;
out-ports {
port {
swao_tpdm_out: endpoint {
remote-endpoint = <&aoss_tpda_in4>;
};
};
};
};
cti@6b11000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x06b11000 0x0 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
etm@7040000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0x07040000 0 0x1000>;
@@ -3885,6 +4177,12 @@
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
refgen: regulator@88e7000 {
compatible = "qcom,sc7280-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x088e7000 0x0 0x84>;
};
usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sc7280-qmp-usb3-dp-phy";
reg = <0 0x088e8000 0 0x3000>;
@@ -5074,6 +5372,8 @@
phys = <&mdss_dsi_phy>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;

105
arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso Normal file
View File

@@ -0,0 +1,105 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/*
* Camera Sensor overlay on top of leman evk core kit.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
#include <dt-bindings/gpio/gpio.h>
&{/} {
vreg_cam1_1p8: vreg_cam1_1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_cam1_1p8";
startup-delay-us = <10000>;
enable-active-high;
gpio = <&pmm8654au_0_gpios 8 GPIO_ACTIVE_HIGH>;
};
};
&camcc {
status = "okay";
};
&camss {
vdda-pll-supply = <&vreg_l1c>;
vdda-phy-supply = <&vreg_l4a>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
csiphy1_ep: endpoint {
clock-lanes = <7>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&imx577_ep1>;
};
};
};
};
&cci1 {
pinctrl-0 = <&cci1_0_default>;
pinctrl-1 = <&cci1_0_sleep>;
status = "okay";
};
&cci1_i2c0 {
#address-cells = <1>;
#size-cells = <0>;
camera@1a {
compatible = "sony,imx577";
reg = <0x1a>;
reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&cam1_default>;
pinctrl-names = "default";
clocks = <&camcc CAM_CC_MCLK1_CLK>;
assigned-clocks = <&camcc CAM_CC_MCLK1_CLK>;
assigned-clock-rates = <24000000>;
dovdd-supply = <&vreg_s4a>;
avdd-supply = <&vreg_cam1_1p8>;
port {
imx577_ep1: endpoint {
clock-lanes = <7>;
link-frequencies = /bits/ 64 <600000000>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&csiphy1_ep>;
};
};
};
};
&tlmm {
cam1_default: cam1-default-state {
mclk-pins {
pins = "gpio73";
function = "cam_mclk";
drive-strength = <2>;
bias-disable;
};
rst-pins {
pins = "gpio133";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};
};

28
arch/arm64/boot/dts/qcom/lemans-evk.dts
View File

@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
@@ -501,6 +502,20 @@
};
};
&i2c19 {
status = "okay";
fan_controller: fan@18 {
compatible = "ti,amc6821";
reg = <0x18>;
#pwm-cells = <2>;
fan {
pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
};
};
};
&iris {
firmware-name = "qcom/vpu/vpu30_p4_s6_16mb.mbn";
@@ -587,15 +602,28 @@
status = "okay";
};
&pmm8654au_0_pon_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&qup_i2c19_default {
drive-strength = <2>;
bias-pull-up;
};
&qupv3_id_0 {
firmware-name = "qcom/sa8775p/qupv3fw.elf";
status = "okay";
};
&qupv3_id_1 {
firmware-name = "qcom/sa8775p/qupv3fw.elf";
status = "okay";
};
&qupv3_id_2 {
firmware-name = "qcom/sa8775p/qupv3fw.elf";
status = "okay";
};

9
arch/arm64/boot/dts/qcom/lemans-pmics.dtsi
View File

@@ -132,6 +132,15 @@
};
};
pmm8654au_0_rtc: rtc@6100 {
compatible = "qcom,pmk8350-rtc";
reg = <0x6100>,
<0x6200>;
reg-names = "rtc",
"alarm";
interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
};
pmm8654au_0_gpios: gpio@8800 {
compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
reg = <0x8800>;

133
arch/arm64/boot/dts/qcom/lemans.dtsi
View File

@@ -3901,6 +3901,32 @@
status = "disabled";
};
usb_1_hsphy: phy@88e6000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
reg = <0 0x088e6000 0 0x120>;
clocks = <&gcc GCC_USB_CLKREF_EN>;
clock-names = "ref";
resets = <&gcc GCC_USB2_PHY_SEC_BCR>;
#phy-cells = <0>;
status = "disabled";
};
usb_2_hsphy: phy@88e7000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
reg = <0 0x088e7000 0 0x120>;
clocks = <&gcc GCC_USB_CLKREF_EN>;
clock-names = "ref";
resets = <&gcc GCC_USB3_PHY_TERT_BCR>;
#phy-cells = <0>;
status = "disabled";
};
usb_0_qmpphy: phy@88e8000 {
compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
reg = <0 0x088e8000 0 0x2000>;
@@ -3925,6 +3951,36 @@
status = "disabled";
};
usb_1_qmpphy: phy@88ea000 {
compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
reg = <0 0x088ea000 0 0x2000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
<&gcc GCC_USB_CLKREF_EN>,
<&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
clock-names = "aux", "ref", "com_aux", "pipe";
resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
<&gcc GCC_USB3PHY_PHY_SEC_BCR>;
reset-names = "phy", "phy_phy";
power-domains = <&gcc USB30_SEC_GDSC>;
#clock-cells = <0>;
clock-output-names = "usb3_sec_phy_pipe_clk_src";
#phy-cells = <0>;
status = "disabled";
};
refgen: regulator@891c000 {
compatible = "qcom,sa8775p-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x0891c000 0x0 0x84>;
};
usb_0: usb@a600000 {
compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a600000 0 0xfc100>;
@@ -3973,43 +4029,6 @@
status = "disabled";
};
usb_1_hsphy: phy@88e6000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
reg = <0 0x088e6000 0 0x120>;
clocks = <&gcc GCC_USB_CLKREF_EN>;
clock-names = "ref";
resets = <&gcc GCC_USB2_PHY_SEC_BCR>;
#phy-cells = <0>;
status = "disabled";
};
usb_1_qmpphy: phy@88ea000 {
compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
reg = <0 0x088ea000 0 0x2000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
<&gcc GCC_USB_CLKREF_EN>,
<&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
clock-names = "aux", "ref", "com_aux", "pipe";
resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
<&gcc GCC_USB3PHY_PHY_SEC_BCR>;
reset-names = "phy", "phy_phy";
power-domains = <&gcc USB30_SEC_GDSC>;
#clock-cells = <0>;
clock-output-names = "usb3_sec_phy_pipe_clk_src";
#phy-cells = <0>;
status = "disabled";
};
usb_1: usb@a800000 {
compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a800000 0 0xfc100>;
@@ -4058,19 +4077,6 @@
status = "disabled";
};
usb_2_hsphy: phy@88e7000 {
compatible = "qcom,sa8775p-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";
reg = <0 0x088e7000 0 0x120>;
clocks = <&gcc GCC_USB_CLKREF_EN>;
clock-names = "ref";
resets = <&gcc GCC_USB3_PHY_TERT_BCR>;
#phy-cells = <0>;
status = "disabled";
};
usb_2: usb@a400000 {
compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a400000 0 0xfc100>;
@@ -4106,6 +4112,7 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB2 0>;
interconnect-names = "usb-ddr", "apps-usb";
qcom,select-utmi-as-pipe-clk;
wakeup-source;
iommus = <&apps_smmu 0x020 0x0>;
@@ -4899,6 +4906,8 @@
operating-points-v2 = <&mdss_dsi_opp_table>;
power-domains = <&rpmhpd SA8775P_MMCX>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;
@@ -4981,6 +4990,8 @@
operating-points-v2 = <&mdss_dsi_opp_table>;
power-domains = <&rpmhpd SA8775P_MMCX>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;
@@ -6812,11 +6823,12 @@
"ptp_ref",
"phyaux";
interconnects = <&aggre1_noc MASTER_EMAC_1 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_EMAC1_CFG QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "mac-mem", "cpu-mac";
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_EMAC1_CFG QCOM_ICC_TAG_ALWAYS>,
<&aggre1_noc MASTER_EMAC_1 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "cpu-mac",
"mac-mem";
power-domains = <&gcc EMAC1_GDSC>;
@@ -6853,11 +6865,12 @@
"ptp_ref",
"phyaux";
interconnects = <&aggre1_noc MASTER_EMAC QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_EMAC_CFG QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "mac-mem", "cpu-mac";
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_EMAC_CFG QCOM_ICC_TAG_ALWAYS>,
<&aggre1_noc MASTER_EMAC QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "cpu-mac",
"mac-mem";
power-domains = <&gcc EMAC0_GDSC>;

6
arch/arm64/boot/dts/qcom/monaco-evk.dts
View File

@@ -9,8 +9,8 @@
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qcs8300.dtsi"
#include "qcs8300-pmics.dtsi"
#include "monaco.dtsi"
#include "monaco-pmics.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Monaco EVK";
@@ -401,10 +401,12 @@
};
&qupv3_id_0 {
firmware-name = "qcom/qcs8300/qupv3fw.elf";
status = "okay";
};
&qupv3_id_1 {
firmware-name = "qcom/qcs8300/qupv3fw.elf";
status = "okay";
};

1
arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi → arch/arm64/boot/dts/qcom/monaco-pmics.dtsi
View File

@@ -18,7 +18,6 @@
reg = <0x6100>, <0x6200>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
allow-set-time;
};
pmm8620au_0_gpios: gpio@8800 {

7
arch/arm64/boot/dts/qcom/qcs8300.dtsi → arch/arm64/boot/dts/qcom/monaco.dtsi
View File

@@ -20,6 +20,7 @@
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
@@ -4294,6 +4295,12 @@
status = "disabled";
};
refgen: regulator@891c000 {
compatible = "qcom,qcs8300-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x0891c000 0x0 0x84>;
};
gpu: gpu@3d00000 {
compatible = "qcom,adreno-623.0", "qcom,adreno";
reg = <0x0 0x03d00000 0x0 0x40000>,

46
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
View File

@@ -79,6 +79,19 @@
};
};
reg_ts_vcca: regulator-vcca-ts {
compatible = "regulator-fixed";
regulator-name = "regulator-vcca-ts";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 78 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&ts_vcca_default>;
pinctrl-names = "default";
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
@@ -176,6 +189,25 @@
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@48 {
compatible = "himax,hx8527e", "himax,hx852es";
reg = <0x48>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
vcca-supply = <&reg_ts_vcca>;
vccd-supply = <&pm8916_l6>;
pinctrl-0 = <&ts_int_reset_default>;
pinctrl-names = "default";
linux,keycodes = <KEY_BACK KEY_HOMEPAGE KEY_APPSELECT>;
};
};
&blsp_uart2 {
status = "okay";
pinctrl-0 = <&blsp_uart2_console_default>;
@@ -338,6 +370,20 @@
bias-disable;
};
ts_int_reset_default: ts-int-reset-default-state {
pins = "gpio12", "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
ts_vcca_default: ts-vcca-default-state {
pins = "gpio78";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
usb_id_default: usb-id-default-state {
pins = "gpio110";
function = "gpio";

22
arch/arm64/boot/dts/qcom/msm8916-samsung-rossa-common.dtsi
View File

@@ -5,7 +5,7 @@
/* SM5504 MUIC instead of SM5502 */
/delete-node/ &muic;
/* Touchscreen varies depending on model variant */
/* IST3038 instead of Zinitix BT541 */
/delete-node/ &touchscreen;
&blsp_i2c1 {
@@ -24,6 +24,26 @@
};
};
&blsp_i2c5 {
touchscreen: touchscreen@50 {
compatible = "imagis,ist3038";
reg = <0x50>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <480>;
touchscreen-size-y = <800>;
vdd-supply = <&reg_vdd_tsp_a>;
vddio-supply = <&pm8916_l6>;
pinctrl-0 = <&tsp_int_default>;
pinctrl-names = "default";
linux,keycodes = <KEY_APPSELECT KEY_BACK>;
};
};
/* On rossa backlight is controlled with MIPI DCS commands */
&clk_pwm {
status = "disabled";

20
arch/arm64/boot/dts/qcom/msm8916-samsung-rossa.dts
View File

@@ -16,26 +16,6 @@
constant-charge-voltage-max-microvolt = <4400000>;
};
&blsp_i2c5 {
touchscreen@50 {
compatible = "imagis,ist3038";
reg = <0x50>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <480>;
touchscreen-size-y = <800>;
vdd-supply = <&reg_vdd_tsp_a>;
vddio-supply = <&pm8916_l6>;
pinctrl-0 = <&tsp_int_default>;
pinctrl-names = "default";
linux,keycodes = <KEY_APPSELECT KEY_BACK>;
};
};
&mpss_mem {
/* Firmware for rossa needs more space */
reg = <0x0 0x86800000 0x0 0x5800000>;

381
arch/arm64/boot/dts/qcom/msm8937-xiaomi-land.dts Normal file
View File

@@ -0,0 +1,381 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024, Barnabas Czeman
*/
/dts-v1/;
#include <dt-bindings/arm/qcom,ids.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "msm8937.dtsi"
#include "pm8937.dtsi"
#include "pmi8950.dtsi"
/delete-node/ &qseecom_mem;
/ {
model = "Xiaomi Redmi 3S (land)";
compatible = "xiaomi,land", "qcom,msm8937";
chassis-type = "handset";
qcom,msm-id = <QCOM_ID_MSM8937 0x0>;
qcom,board-id = <0x1000b 1>, <0x2000b 1>;
aliases {
mmc0 = &sdhc_1;
mmc1 = &sdhc_2;
};
battery: battery {
compatible = "simple-battery";
charge-full-design-microamp-hours = <4100000>;
constant-charge-current-max-microamp = <1000000>;
voltage-min-design-microvolt = <3400000>;
voltage-max-design-microvolt = <4400000>;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "framebuffer0";
framebuffer0: framebuffer@8dd01000 {
compatible = "simple-framebuffer";
reg = <0x0 0x8dd01000 0x0 (720 * 1280 * 3)>;
width = <720>;
height = <1280>;
stride = <(720 * 3)>;
format = "r8g8b8";
clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>,
<&gcc GCC_MDSS_VSYNC_CLK>,
<&gcc GCC_MDSS_MDP_CLK>,
<&gcc GCC_MDSS_BYTE0_CLK>,
<&gcc GCC_MDSS_PCLK0_CLK>,
<&gcc GCC_MDSS_ESC0_CLK>;
power-domains = <&gcc MDSS_GDSC>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
key-volup {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
debounce-interval = <15>;
};
};
irled {
compatible = "gpio-ir-tx";
gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
};
reserved-memory {
reserved@84a00000 {
reg = <0x0 0x84a00000 0x0 0x1900000>;
no-map;
};
framebuffer: memory@8dd01000 {
reg = <0x0 0x8dd01000 0x0 (720 * 1280 * 3)>;
no-map;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
};
};
&blsp1_i2c2 {
status = "okay";
led-controller@45 {
compatible = "awinic,aw2013";
reg = <0x45>;
#address-cells = <1>;
#size-cells = <0>;
vcc-supply = <&pm8937_l10>;
vio-supply = <&pm8937_l5>;
led@0 {
reg = <0>;
function = LED_FUNCTION_STATUS;
led-max-microamp = <5000>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
function = LED_FUNCTION_STATUS;
led-max-microamp = <5000>;
color = <LED_COLOR_ID_GREEN>;
};
led@2 {
reg = <2>;
function = LED_FUNCTION_STATUS;
led-max-microamp = <5000>;
color = <LED_COLOR_ID_BLUE>;
};
};
};
&blsp1_i2c3 {
status = "okay";
touchscreen@3e {
compatible = "edt,edt-ft5306";
reg = <0x3e>;
interrupts-extended = <&tlmm 65 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8937_l10>;
iovcc-supply = <&pm8937_l5>;
pinctrl-0 = <&tsp_int_rst_default>;
pinctrl-names = "default";
touchscreen-size-x = <720>;
touchscreen-size-y = <1280>;
};
};
&pm8937_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pm8937_spmi_regulators {
/* APC */
pm8937_s5: s5 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
};
&pmi8950_wled {
qcom,num-strings = <2>;
qcom,external-pfet;
qcom,current-limit-microamp = <20000>;
qcom,ovp-millivolt = <29600>;
status = "okay";
};
&rpm_requests {
regulators-0 {
compatible = "qcom,rpm-pm8937-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_l1_l19-supply = <&pm8937_s3>;
vdd_l2_l23-supply = <&pm8937_s3>;
vdd_l3-supply = <&pm8937_s3>;
vdd_l4_l5_l6_l7_l16-supply = <&pm8937_s4>;
vdd_l8_l11_l12_l17_l22-supply = <&vph_pwr>;
vdd_l9_l10_l13_l14_l15_l18-supply = <&vph_pwr>;
pm8937_s1: s1 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1225000>;
};
pm8937_s3: s3 {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
};
pm8937_s4: s4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
pm8937_l2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
pm8937_l5: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8937_l6: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8937_l7: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8937_l8: l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
pm8937_l9: l9 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
pm8937_l10: l10 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3000000>;
};
pm8937_l11: l11 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
pm8937_l12: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
pm8937_l13: l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
pm8937_l14: l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
pm8937_l15: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
pm8937_l16: l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
pm8937_l17: l17 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2900000>;
};
pm8937_l19: l19 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1350000>;
};
pm8937_l22: l22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
pm8937_l23: l23 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
};
&sdc2_cmd_default {
drive-strength = <12>;
};
&sdc2_data_default {
drive-strength = <12>;
};
&sdhc_1 {
vmmc-supply = <&pm8937_l8>;
vqmmc-supply = <&pm8937_l5>;
status = "okay";
};
&sdhc_2 {
cd-gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
vmmc-supply = <&pm8937_l11>;
vqmmc-supply = <&pm8937_l12>;
pinctrl-0 = <&sdc2_default &sdc2_cd_default>;
pinctrl-1 = <&sdc2_sleep &sdc2_cd_default>;
pinctrl-names = "default", "sleep";
status = "okay";
};
&sleep_clk {
clock-frequency = <32768>;
};
&tlmm {
gpio-reserved-ranges = <0 4>, <20 4>;
gpio_keys_default: gpio-keys-default-state {
pins = "gpio91";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
sdc2_cd_default: sdc2-cd-default-state {
pins = "gpio67";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_int_rst_default: tsp-int-rst-default-state {
pins = "gpio64", "gpio65";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
&wcnss {
vddpx-supply = <&pm8937_l5>;
status = "okay";
};
&wcnss_iris {
compatible = "qcom,wcn3620";
vddxo-supply = <&pm8937_l7>;
vddrfa-supply = <&pm8937_l19>;
vddpa-supply = <&pm8937_l9>;
vdddig-supply = <&pm8937_l5>;
};
&wcnss_mem {
status = "okay";
};
&xo_board {
clock-frequency = <19200000>;
};

2133
arch/arm64/boot/dts/qcom/msm8937.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

256
arch/arm64/boot/dts/qcom/msm8939-asus-z00t.dts Normal file
View File

@@ -0,0 +1,256 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8939-pm8916.dtsi"
#include "msm8916-modem-qdsp6.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Asus ZenFone 2 Laser/Selfie (1080p)";
compatible = "asus,z00t", "qcom,msm8939";
chassis-type = "handset";
aliases {
mmc0 = &sdhc_1;
mmc1 = &sdhc_2;
serial0 = &blsp_uart2;
};
chosen {
stdout-path = "serial0";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
button-volume-up {
label = "Volume Up";
gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <15>;
};
button-volume-down {
label = "Volume Down";
gpios = <&tlmm 117 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <15>;
};
};
reg_sd_vmmc: regulator-sdcard-vmmc {
compatible = "regulator-fixed";
regulator-name = "sdcard-vmmc";
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <200>;
pinctrl-0 = <&sd_vmmc_en_default>;
pinctrl-names = "default";
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb_id_default>;
pinctrl-names = "default";
};
};
&blsp_i2c2 {
status = "okay";
magnetometer@c {
compatible = "asahi-kasei,ak09911";
reg = <0x0c>;
vdd-supply = <&pm8916_l8>;
vid-supply = <&pm8916_l6>;
reset-gpios = <&tlmm 112 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&mag_reset_default>;
pinctrl-names = "default";
};
imu@68 {
compatible = "invensense,mpu6515";
reg = <0x68>;
interrupts-extended = <&tlmm 36 IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&pm8916_l8>;
vddio-supply = <&pm8916_l6>;
pinctrl-0 = <&imu_default>;
pinctrl-names = "default";
mount-matrix = "0", "1", "0",
"-1", "0", "0",
"0", "0", "1";
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5306";
reg = <0x38>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8916_l8>;
iovcc-supply = <&pm8916_l6>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <1920>;
pinctrl-0 = <&touchscreen_default>;
pinctrl-names = "default";
};
};
&blsp_uart2 {
pinctrl-0 = <&blsp_uart2_console_default>;
pinctrl-1 = <&blsp_uart2_console_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
};
&mpss_mem {
reg = <0x0 0x86800000 0x0 0x5500000>;
};
&pm8916_codec {
qcom,micbias-lvl = <2800>;
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
qcom,micbias1-ext-cap;
qcom,hphl-jack-type-normally-open;
status = "okay";
};
&pm8916_vib {
status = "okay";
};
&sdhc_1 {
status = "okay";
};
&sdhc_2 {
vmmc-supply = <&reg_sd_vmmc>;
pinctrl-0 = <&sdc2_default &sdc2_cd_default>;
pinctrl-1 = <&sdc2_sleep &sdc2_cd_default>;
pinctrl-names = "default", "sleep";
cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
status = "okay";
};
&sound {
audio-routing =
"AMIC1", "MIC BIAS External1",
"AMIC2", "MIC BIAS Internal2",
"AMIC3", "MIC BIAS External1";
status = "okay";
};
&usb {
extcon = <&usb_id>, <&usb_id>;
status = "okay";
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&wcnss {
status = "okay";
};
&wcnss_iris {
compatible = "qcom,wcn3660b";
};
&wcnss_mem {
status = "okay";
};
&tlmm {
touchscreen_default: touchscreen-default-state {
reset-pins {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
touch-pins {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
imu_default: imu-default-state {
pins = "gpio36";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
sdc2_cd_default: sdc2-cd-default-state {
pins = "gpio38";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
sd_vmmc_en_default: sd-vmmc-en-default-state {
pins = "gpio87";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107", "gpio117";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
usb_id_default: usb-id-default-state {
pins = "gpio110";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
mag_reset_default: mag-reset-default-state {
pins = "gpio112";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

6
arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts
View File

@@ -27,10 +27,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/msm8996/oneplus3/a530_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/msm8996/oneplus3/a530_zap.mbn";
};
&mss_pil {

6
arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts
View File

@@ -28,10 +28,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/msm8996/oneplus3t/a530_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/msm8996/oneplus3t/a530_zap.mbn";
};
&mss_pil {

6
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View File

@@ -91,10 +91,8 @@
};
&gpu {
zap-shader {
firmware-name = "qcom/msm8996/gemini/a530_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/msm8996/gemini/a530_zap.mbn";
};
&mdss_dsi0 {

2
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@@ -1333,7 +1333,7 @@
};
};
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
};

6
arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts
View File

@@ -39,10 +39,8 @@
};
};
&gpu {
zap-shader {
firmware-name = "qcom/msm8996/natrium/a530_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/msm8996/natrium/a530_zap.mbn";
};
&mdss_dsi0 {

6
arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts
View File

@@ -91,10 +91,8 @@
};
};
&gpu {
zap-shader {
firmware-name = "qcom/msm8996/scorpio/a530_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/msm8996/scorpio/a530_zap.mbn";
};
&mdp_smmu {

14
arch/arm64/boot/dts/qcom/pmi8950.dtsi
View File

@@ -22,19 +22,19 @@
channel@0 {
reg = <VADC_USBIN>;
qcom,pre-scaling = <1 4>;
qcom,pre-scaling = <1 20>;
label = "usbin";
};
channel@1 {
reg = <VADC_DCIN>;
qcom,pre-scaling = <1 4>;
qcom,pre-scaling = <1 20>;
label = "dcin";
};
channel@2 {
reg = <VADC_VCHG_SNS>;
qcom,pre-scaling = <1 1>;
qcom,pre-scaling = <1 3>;
label = "vchg_sns";
};
@@ -55,6 +55,14 @@
qcom,pre-scaling = <1 1>;
label = "chg_temp";
};
channel@e {
reg = <VADC_GND_REF>;
};
channel@f {
reg = <VADC_VDD_VADC>;
};
};
pmi8950_mpps: mpps@a000 {

4
arch/arm64/boot/dts/qcom/x1p42100.dtsi → arch/arm64/boot/dts/qcom/purwa.dtsi
View File

@@ -3,8 +3,8 @@
* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/* X1P42100 is heavily based on X1E80100, with some meaningful differences */
#include "x1e80100.dtsi"
/* X1P42100 is heavily based on hamoa, with some meaningful differences */
#include "hamoa.dtsi"
/delete-node/ &bwmon_cluster0;
/delete-node/ &cluster_pd2;

51
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
View File

@@ -16,7 +16,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm7250b.dtsi"
#include "pm7325.dtsi"
#include "pm8350c.dtsi" /* PM7350C */
@@ -47,6 +47,8 @@
stride = <(1224 * 4)>;
format = "a8r8g8b8";
clocks = <&gcc GCC_DISP_HF_AXI_CLK>;
vci-supply = <&vreg_oled_vci>;
dvdd-supply = <&vreg_oled_dvdd>;
};
};
@@ -193,6 +195,19 @@
pinctrl-names = "default";
};
vreg_vtof_ldo_2p8: regulator-vtof-ldo-2p8 {
compatible = "regulator-fixed";
regulator-name = "VTOF_LDO_2P8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-enable-ramp-delay = <233>;
gpio = <&tlmm 141 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vreg_bob>;
};
reserved-memory {
cont_splash_mem: cont-splash@e1000000 {
reg = <0x0 0xe1000000 0x0 0x2300000>;
@@ -627,6 +642,15 @@
};
&cci0_i2c1 {
camera_imx858_dw9800k: actuator@e {
compatible = "dongwoon,dw9800k";
reg = <0x0e>;
vdd-supply = <&vreg_afvdd_2p8>;
dongwoon,sac-mode = <1>;
dongwoon,vcm-prescale = <16>;
};
/* IMX858 @ 29 */
eeprom@54 {
@@ -749,6 +773,8 @@
regulator-name = "vreg_l6p";
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1904000>;
/* Pull-up for CCI I2C busses */
regulator-always-on;
};
vreg_l7p: ldo7 {
@@ -780,7 +806,16 @@
};
};
/* AW86927FCR haptics @ 5a */
vibrator@5a {
compatible = "awinic,aw86927";
reg = <0x5a>;
interrupts-extended = <&tlmm 101 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&aw86927_int_default>;
pinctrl-names = "default";
};
};
&i2c2 {
@@ -839,6 +874,11 @@
status = "okay";
};
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
};
&mdss {
status = "okay";
};
@@ -1318,6 +1358,13 @@
bias-disable;
output-high;
};
aw86927_int_default: aw86927-int-default-state {
pins = "gpio101";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
&uart5 {

2
arch/arm64/boot/dts/qcom/qcm6490-idp.dts
View File

@@ -13,7 +13,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm7250b.dtsi"
#include "pm7325.dtsi"
#include "pm8350c.dtsi"

2
arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts
View File

@@ -11,7 +11,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm8350c.dtsi"
#include "pmk8350.dtsi"

82
arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
View File

@@ -14,7 +14,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm7250b.dtsi"
#include "pm7325.dtsi"
#include "pm8350c.dtsi" /* PM7350C */
@@ -118,6 +118,11 @@
no-map;
};
removed_mem: removed@c0000000 {
reg = <0x0 0xc0000000 0x0 0x5100000>;
no-map;
};
rmtfs_mem: rmtfs@f8500000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0xf8500000 0x0 0x600000>;
@@ -130,8 +135,6 @@
thermal-zones {
camera-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_adc_tm 2>;
trips {
@@ -144,8 +147,6 @@
};
chg-skin-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm7250b_adc_tm 0>;
trips {
@@ -158,8 +159,6 @@
};
conn-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm7250b_adc_tm 1>;
trips {
@@ -172,8 +171,6 @@
};
quiet-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_adc_tm 1>;
trips {
@@ -186,8 +183,6 @@
};
rear-cam-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_adc_tm 4>;
trips {
@@ -200,8 +195,6 @@
};
sdm-skin-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_adc_tm 3>;
trips {
@@ -214,8 +207,6 @@
};
xo-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_adc_tm 0>;
trips {
@@ -568,6 +559,11 @@
status = "okay";
};
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
};
&pm7250b_adc {
channel@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
@@ -614,6 +610,46 @@
};
};
&pm8350c_flash {
status = "okay";
led-0 {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
led-sources = <1>, <2>;
led-max-microamp = <500000>;
flash-max-microamp = <1500000>;
flash-max-timeout-us = <1280000>;
};
};
&pm8350c_pwm {
status = "okay";
multi-led {
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STATUS;
#address-cells = <1>;
#size-cells = <0>;
led@1 {
reg = <1>;
color = <LED_COLOR_ID_RED>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
led@3 {
reg = <3>;
color = <LED_COLOR_ID_BLUE>;
};
};
};
&pmk8350_adc_tm {
status = "okay";
@@ -857,7 +893,7 @@
&uart7 {
/delete-property/interrupts;
interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
pinctrl-names = "default", "sleep";
@@ -920,10 +956,6 @@
remote-endpoint = <&pmic_glink_hs_in>;
};
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
vdda-pll-supply = <&vreg_l10c>;
vdda18-supply = <&vreg_l1c>;
@@ -950,6 +982,16 @@
status = "okay";
};
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
&venus {
firmware-name = "qcom/qcm6490/SHIFT/otter/venus.mbn";
status = "okay";
};
&wifi {
qcom,calibration-variant = "SHIFTphone_8";

155
arch/arm64/boot/dts/qcom/qcs615-ride.dts
View File

@@ -7,10 +7,10 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/gpio/gpio.h>
#include "sm6150.dtsi"
#include "talos.dtsi"
#include "pm8150.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS615 Ride";
model = "Qualcomm Technologies, Inc. QCS615 Ride (IQ-615 Beta EVK)";
compatible = "qcom,qcs615-ride", "qcom,qcs615", "qcom,sm6150";
chassis-type = "embedded";
@@ -39,6 +39,18 @@
};
};
dp-dsi0-connector {
compatible = "dp-connector";
label = "DSI0";
type = "mini";
port {
dp_dsi0_connector_in: endpoint {
remote-endpoint = <&dsi2dp_bridge_out>;
};
};
};
vreg_conn_1p8: regulator-conn-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_conn_1p8";
@@ -65,6 +77,64 @@
regulator-always-on;
};
vreg_12p0: regulator-vreg-12p0 {
compatible = "regulator-fixed";
regulator-name = "VREG_12P0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vreg_1p0: regulator-vreg-1p0 {
compatible = "regulator-fixed";
regulator-name = "VREG_1P0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
vin-supply = <&vreg_1p8>;
};
vreg_1p8: regulator-vreg-1p8 {
compatible = "regulator-fixed";
regulator-name = "VREG_1P8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vreg_5p0>;
};
vreg_3p0: regulator-vreg-3p0 {
compatible = "regulator-fixed";
regulator-name = "VREG_3P0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
vin-supply = <&vreg_12p0>;
};
vreg_5p0: regulator-vreg-5p0 {
compatible = "regulator-fixed";
regulator-name = "VREG_5P0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vreg_12p0>;
};
wcn6855-pmu {
compatible = "qcom,wcn6855-pmu";
@@ -288,6 +358,86 @@
};
};
&i2c2 {
clock-frequency = <400000>;
status = "okay";
io_expander: pinctrl@3e {
compatible = "semtech,sx1509q";
reg = <0x3e>;
interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
semtech,probe-reset;
};
i2c-mux@77 {
compatible = "nxp,pca9542";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
bridge@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
vdd10-supply = <&vreg_1p0>;
vdd18-supply = <&vreg_1p8>;
vdd33-supply = <&vreg_3p0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi2dp_bridge_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
port@1 {
reg = <1>;
dsi2dp_bridge_out: endpoint {
remote-endpoint = <&dp_dsi0_connector_in>;
};
};
};
};
};
};
};
&mdss {
status = "okay";
};
&mdss_dsi0 {
vdda-supply = <&vreg_l11a>;
status = "okay";
};
&mdss_dsi0_out {
remote-endpoint = <&dsi2dp_bridge_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vcca-supply = <&vreg_l5a>;
status = "okay";
};
&pcie {
perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
@@ -398,6 +548,7 @@
pins = "gpio98";
function = "gpio";
bias-pull-down;
drive-strength = <16>;
output-low;
};
};

1095
arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts Normal file
View File

File diff suppressed because it is too large Load Diff

76
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@@ -14,7 +14,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm7250b.dtsi"
#include "pm7325.dtsi"
#include "pm8350c.dtsi"
@@ -217,6 +217,13 @@
};
};
vph_pwr: regulator-vph-pwr {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
thermal-zones {
sdm-skin-thermal {
thermal-sensors = <&pmk8350_adc_tm 3>;
@@ -255,13 +262,6 @@
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
wcn6750-pmu {
compatible = "qcom,wcn6750-pmu";
pinctrl-0 = <&bt_en>;
@@ -335,8 +335,6 @@
vdd-s8-supply = <&vph_pwr>;
vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>;
vdd-l2-l7-supply = <&vreg_bob_3p296>;
vdd-l3-supply = <&vreg_s2b_0p876>;
vdd-l5-supply = <&vreg_s2b_0p876>;
vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>;
vdd-l8-supply = <&vreg_s7b_0p972>;
vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>;
@@ -349,12 +347,6 @@
regulator-max-microvolt = <2040000>;
};
vreg_s2b_0p876: smps2 {
regulator-name = "vreg_s2b_0p876";
regulator-min-microvolt = <570070>;
regulator-max-microvolt = <1050000>;
};
vreg_s7b_0p972: smps7 {
regulator-name = "vreg_s7b_0p972";
regulator-min-microvolt = <535000>;
@@ -385,27 +377,13 @@
vreg_l3b_0p504: ldo3 {
regulator-name = "vreg_l3b_0p504";
regulator-min-microvolt = <312000>;
regulator-max-microvolt = <910000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4b_0p752: ldo4 {
regulator-name = "vreg_l4b_0p752";
regulator-min-microvolt = <752000>;
regulator-max-microvolt = <820000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
reg_l5b_0p752: ldo5 {
regulator-name = "reg_l5b_0p752";
regulator-min-microvolt = <552000>;
regulator-max-microvolt = <832000>;
regulator-max-microvolt = <650000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6b_1p2: ldo6 {
regulator-name = "vreg_l6b_1p2";
regulator-min-microvolt = <1140000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1260000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -436,7 +414,7 @@
vreg_l11b_1p504: ldo11 {
regulator-name = "vreg_l11b_1p504";
regulator-min-microvolt = <1504000>;
regulator-min-microvolt = <1776000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -457,7 +435,7 @@
vreg_l14b_1p08: ldo14 {
regulator-name = "vreg_l14b_1p08";
regulator-min-microvolt = <1080000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -521,26 +499,8 @@
vreg_s1c_2p19: smps1 {
regulator-name = "vreg_s1c_2p19";
regulator-min-microvolt = <2190000>;
regulator-max-microvolt = <2210000>;
};
vreg_s2c_0p752: smps2 {
regulator-name = "vreg_s2c_0p752";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <800000>;
};
vreg_s5c_0p752: smps5 {
regulator-name = "vreg_s5c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <1050000>;
};
vreg_s7c_0p752: smps7 {
regulator-name = "vreg_s7c_0p752";
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <800000>;
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2208000>;
};
vreg_s9c_1p084: smps9 {
@@ -600,7 +560,7 @@
vreg_l8c_1p62: ldo8 {
regulator-name = "vreg_l8c_1p62";
regulator-min-microvolt = <1620000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -608,7 +568,7 @@
vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <35440000>;
regulator-max-microvolt = <3544000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -628,7 +588,7 @@
vreg_l12c_1p65: ldo12 {
regulator-name = "vreg_l12c_1p65";
regulator-min-microvolt = <1650000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -1009,10 +969,12 @@
};
&qupv3_id_0 {
firmware-name = "qcom/qcs6490/qupv3fw.elf";
status = "okay";
};
&qupv3_id_1 {
firmware-name = "qcom/qcs6490/qupv3fw.elf";
status = "okay";
};

4
arch/arm64/boot/dts/qcom/qcs8300-ride.dts
View File

@@ -8,8 +8,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qcs8300.dtsi"
#include "qcs8300-pmics.dtsi"
#include "monaco.dtsi"
#include "monaco-pmics.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS8300 Ride";
compatible = "qcom,qcs8300-ride", "qcom,qcs8300";

65
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
View File

@@ -7,7 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "qcm2290.dtsi"
#include "agatti.dtsi"
#include "pm4125.dtsi"
/ {
@@ -188,6 +188,53 @@
regulator-always-on;
regulator-boot-on;
};
sound {
compatible = "qcom,qrb2210-sndcard";
pinctrl-0 = <&lpi_i2s2_active>;
pinctrl-names = "default";
model = "Qualcomm-RB1-WSA8815-Speaker-DMIC0";
mm1-dai-link {
link-name = "MultiMedia1";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
};
mm2-dai-link {
link-name = "MultiMedia2";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
};
mm3-dai-link {
link-name = "MultiMedia3";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
hdmi-i2s-dai-link {
link-name = "HDMI/I2S Playback";
codec {
sound-dai = <&lt9611_codec 0>;
};
cpu {
sound-dai = <&q6afedai SECONDARY_MI2S_RX>;
};
platform {
sound-dai = <&q6routing>;
};
};
};
};
&cpu_pd0 {
@@ -214,10 +261,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/qcm2290/a702_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/qcm2290/a702_zap.mbn";
};
&i2c2_gpio {
@@ -323,6 +370,14 @@
status = "okay";
};
/* SECONDARY I2S uses 1 I2S SD Line for audio on LT9611UXC HDMI Bridge */
&q6afedai {
dai@18 {
reg = <SECONDARY_MI2S_RX>;
qcom,sd-lines = <0>;
};
};
&qupv3_id_0 {
status = "okay";
};
@@ -649,7 +704,7 @@
&uart3 {
/delete-property/ interrupts;
interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
<&tlmm 11 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&uart3_default>;
pinctrl-1 = <&uart3_sleep>;
pinctrl-names = "default", "sleep";

6
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
View File

@@ -245,10 +245,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/qrb4210/a610_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/qrb4210/a610_zap.mbn";
};
&i2c2_gpio {

7
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@@ -594,11 +594,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sm8250/a650_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8250/a650_zap.mbn";
};
/* LS-I2C0 */

14
arch/arm64/boot/dts/qcom/sa8295p-adp.dts
View File

@@ -149,13 +149,6 @@
enable-active-high;
regulator-always-on;
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
};
};
&apps_rsc {
@@ -345,11 +338,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sa8295p/a690_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sa8295p/a690_zap.mbn";
};
&gpu_smmu {

9
arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
View File

@@ -31,7 +31,7 @@
};
reserved-memory {
zap_mem: zap-shader@80840000 {
gpu_mem: zap-shader@80840000 {
reg = <0x0 0x80840000 0 0x2000>;
no-map;
};
@@ -426,11 +426,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&zap_mem>;
firmware-name = "qcom/sc7180/acer/aspire1/qcdxkmsuc7180.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc7180/acer/aspire1/qcdxkmsuc7180.mbn";
};
&mdss {

6
arch/arm64/boot/dts/qcom/sc7180-el2.dtso
View File

@@ -8,10 +8,8 @@
/plugin/;
/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
&gpu {
zap-shader {
status = "disabled";
};
&gpu_zap_shader {
status = "disabled";
};
/* Venus can be used in EL2 if booted similarly to ChromeOS devices. */

1
arch/arm64/boot/dts/qcom/sc7180-idp.dts
View File

@@ -39,6 +39,7 @@
*
*/
/delete-node/ &gpu_zap_shader;
/delete-node/ &hyp_mem;
/delete-node/ &xbl_mem;
/delete-node/ &aop_mem;

1
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View File

@@ -41,6 +41,7 @@
* required by the board dts.
*/
/delete-node/ &gpu_zap_shader;
/delete-node/ &hyp_mem;
/delete-node/ &ipa_fw_mem;
/delete-node/ &xbl_mem;

12
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@@ -1474,6 +1474,12 @@
};
};
refgen: regulator@ff1000 {
compatible = "qcom,sc7180-refgen-regulator",
"qcom,sdm845-refgen-regulator";
reg = <0x0 0x00ff1000 0x0 0x60>;
};
config_noc: interconnect@1500000 {
compatible = "qcom,sc7180-config-noc";
reg = <0 0x01500000 0 0x28000>;
@@ -2179,6 +2185,10 @@
interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -3332,6 +3342,8 @@
phys = <&mdss_dsi0_phy>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View File

@@ -7,7 +7,7 @@
#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
#include <dt-bindings/input/linux-event-codes.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
#include "pm7325.dtsi"
#include "pm8350c.dtsi"
#include "pmk8350.dtsi"
@@ -573,7 +573,7 @@
};
};
/* PINCTRL - additions to nodes defined in sc7280.dtsi */
/* PINCTRL - additions to nodes defined in kodiak.dtsi */
&dp_hot_plug_det {
bias-disable;

2
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
View File

@@ -16,7 +16,7 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "kodiak.dtsi"
/* PMICs depend on spmi_bus label and so must come after SoC */
#include "pm7325.dtsi"

12
arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
View File

@@ -151,11 +151,6 @@
no-map;
};
gpu_mem: gpu-region@98715000 {
reg = <0x0 0x98715000 0x0 0x2000>;
no-map;
};
cdsp_mem: cdsp-region@98900000 {
reg = <0x0 0x98900000 0x0 0x1400000>;
no-map;
@@ -355,11 +350,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8180x/LENOVO/82AK/qcdxkmsuc8180.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8180x/LENOVO/82AK/qcdxkmsuc8180.mbn";
};
&i2c1 {

9
arch/arm64/boot/dts/qcom/sc8180x-primus.dts
View File

@@ -14,6 +14,8 @@
#include "sc8180x.dtsi"
#include "sc8180x-pmics.dtsi"
/delete-node/ &gpu_mem;
/ {
model = "Qualcomm SC8180x Primus";
compatible = "qcom,sc8180x-primus", "qcom,sc8180x";
@@ -442,11 +444,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
};
&i2c1 {

19
arch/arm64/boot/dts/qcom/sc8180x.dtsi
View File

@@ -646,6 +646,11 @@
no-map;
};
gpu_mem: memory@98715000 {
reg = <0x0 0x98715000 0x0 0x2000>;
no-map;
};
reserved@9d400000 {
reg = <0x0 0x9d400000 0x0 0x1000000>;
no-map;
@@ -2274,6 +2279,10 @@
status = "disabled";
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -2530,6 +2539,12 @@
status = "disabled";
};
refgen: regulator@88e7000 {
compatible = "qcom,sc8180x-refgen-regulator",
"qcom,sdm845-refgen-regulator";
reg = <0x0 0x088e7000 0x0 0x60>;
};
usb_prim_qmpphy: phy@88e8000 {
compatible = "qcom,sc8180x-qmp-usb3-dp-phy";
reg = <0 0x088e8000 0 0x3000>;
@@ -3116,6 +3131,8 @@
phys = <&mdss_dsi0_phy>;
phy-names = "dsi";
refgen-supply = <&refgen>;
status = "disabled";
ports {
@@ -3203,6 +3220,8 @@
phys = <&mdss_dsi1_phy>;
phy-names = "dsi";
refgen-supply = <&refgen>;
status = "disabled";
ports {

12
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
View File

@@ -225,11 +225,6 @@
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -509,11 +504,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
};
&mdss0 {

6
arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso
View File

@@ -8,10 +8,8 @@
/plugin/;
/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
&gpu {
zap-shader {
status = "disabled";
};
&gpu_zap_shader {
status = "disabled";
};
/*

12
arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
View File

@@ -158,11 +158,6 @@
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -600,11 +595,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8280xp/HUAWEI/gaokun3/qcdxkmsuc8280.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8280xp/HUAWEI/gaokun3/qcdxkmsuc8280.mbn";
};
&i2c4 {

20
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View File

@@ -83,14 +83,11 @@
pinctrl-names = "default";
pinctrl-0 = <&cam_indicator_en>;
led-camera-indicator {
label = "white:camera-indicator";
privacy_led: privacy-led {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_WHITE>;
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
/* Reuse as a panic indicator until we get a "camera on" trigger */
panic-indicator;
};
};
@@ -283,11 +280,6 @@
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -685,6 +677,9 @@
pinctrl-names = "default";
pinctrl-0 = <&cam_rgb_default>;
leds = <&privacy_led>;
led-names = "privacy";
clocks = <&camcc CAMCC_MCLK3_CLK>;
orientation = <0>; /* Front facing */
@@ -722,11 +717,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcdxkmsuc8280.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcdxkmsuc8280.mbn";
};
&mdss0 {

12
arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
View File

@@ -186,11 +186,6 @@
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -462,11 +457,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcdxkmsuc8280.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcdxkmsuc8280.mbn";
};
&mdss0 {

12
arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
View File

@@ -227,11 +227,6 @@
};
reserved-memory {
gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
@@ -579,11 +574,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcdxkmsuc8280.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcdxkmsuc8280.mbn";
};
&mdss0 {

185
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View File

@@ -691,6 +691,11 @@
no-map;
};
pil_gpu_mem: gpu-mem@8bf00000 {
reg = <0 0x8bf00000 0 0x2000>;
no-map;
};
pil_adsp_mem: adsp-region@86c00000 {
reg = <0 0x86c00000 0 0x2000000>;
no-map;
@@ -967,8 +972,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
<&gpi_dma2 1 6 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
<&gpi_dma2 1 0 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -989,8 +994,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
<&gpi_dma2 1 0 QCOM_GPI_I2C>;
dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
<&gpi_dma2 1 0 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1011,8 +1016,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
<&gpi_dma2 1 0 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
<&gpi_dma2 1 1 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1033,8 +1038,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
<&gpi_dma2 1 1 QCOM_GPI_I2C>;
dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
<&gpi_dma2 1 1 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1069,8 +1074,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
<&gpi_dma2 1 1 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
<&gpi_dma2 1 2 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1091,8 +1096,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
<&gpi_dma2 1 2 QCOM_GPI_I2C>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
<&gpi_dma2 1 2 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1131,8 +1136,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
<&gpi_dma2 1 2 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
<&gpi_dma2 1 3 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1153,8 +1158,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
<&gpi_dma2 1 3 QCOM_GPI_I2C>;
dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
<&gpi_dma2 1 3 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1175,8 +1180,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
<&gpi_dma2 1 3 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
<&gpi_dma2 1 4 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1197,8 +1202,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
<&gpi_dma2 1 4 QCOM_GPI_I2C>;
dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
<&gpi_dma2 1 4 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1241,8 +1246,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
<&gpi_dma2 1 4 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
<&gpi_dma2 1 5 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1285,8 +1290,8 @@
<&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
<&gpi_dma2 1 5 QCOM_GPI_SPI>;
dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
<&gpi_dma2 1 6 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1338,7 +1343,7 @@
};
};
gpi_dma0: dma-controller@900000 {
gpi_dma0: dma-controller@900000 {
compatible = "qcom,sc8280xp-gpi-dma", "qcom,sm6350-gpi-dma";
reg = <0 0x00900000 0 0x60000>;
@@ -1393,8 +1398,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
<&gpi_dma0 1 7 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
<&gpi_dma0 1 0 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1415,8 +1420,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
<&gpi_dma0 1 0 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
<&gpi_dma0 1 0 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1437,8 +1442,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
<&gpi_dma0 1 0 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
<&gpi_dma0 1 1 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1459,8 +1464,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
<&gpi_dma0 1 1 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1481,8 +1486,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
<&gpi_dma0 1 2 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1503,8 +1508,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
<&gpi_dma0 1 2 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1539,8 +1544,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
<&gpi_dma0 1 3 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1561,8 +1566,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
<&gpi_dma0 1 3 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1583,8 +1588,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
<&gpi_dma0 1 4 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1605,8 +1610,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
<&gpi_dma0 1 4 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1627,8 +1632,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1649,8 +1654,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1671,8 +1676,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
<&gpi_dma0 1 6 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1693,8 +1698,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
<&gpi_dma0 1 6 QCOM_GPI_I2C>;
dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
<&gpi_dma0 1 6 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1715,8 +1720,8 @@
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
<&gpi_dma0 1 6 QCOM_GPI_SPI>;
dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
<&gpi_dma0 1 7 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1800,8 +1805,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
<&gpi_dma1 1 7 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
<&gpi_dma1 1 0 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1822,8 +1827,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
<&gpi_dma1 1 0 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
<&gpi_dma1 1 0 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1844,8 +1849,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
<&gpi_dma1 1 0 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
<&gpi_dma1 1 1 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1866,8 +1871,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
<&gpi_dma1 1 1 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
<&gpi_dma1 1 1 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1888,8 +1893,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
<&gpi_dma1 1 1 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
<&gpi_dma1 1 2 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1910,8 +1915,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
<&gpi_dma1 1 2 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
<&gpi_dma1 1 2 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1932,8 +1937,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
<&gpi_dma1 1 2 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
<&gpi_dma1 1 3 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1954,8 +1959,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
<&gpi_dma1 1 3 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
<&gpi_dma1 1 3 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -1976,8 +1981,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
<&gpi_dma1 1 3 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
<&gpi_dma1 1 4 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -1998,8 +2003,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
<&gpi_dma1 1 4 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
<&gpi_dma1 1 4 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -2020,8 +2025,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
<&gpi_dma1 1 4 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
<&gpi_dma1 1 5 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -2042,8 +2047,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
<&gpi_dma1 1 5 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
<&gpi_dma1 1 5 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -2064,8 +2069,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
<&gpi_dma1 1 5 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
<&gpi_dma1 1 6 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -2086,8 +2091,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
<&gpi_dma1 1 6 QCOM_GPI_I2C>;
dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
<&gpi_dma1 1 6 QCOM_GPI_SPI>;
dma-names = "tx",
"rx";
@@ -2108,8 +2113,8 @@
<&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
<&gpi_dma1 1 6 QCOM_GPI_SPI>;
dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
<&gpi_dma1 1 7 QCOM_GPI_I2C>;
dma-names = "tx",
"rx";
@@ -3366,6 +3371,10 @@
status = "disabled";
gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -3723,6 +3732,12 @@
status = "disabled";
};
refgen: regulator@8900000 {
compatible = "qcom,sc8280xp-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x08900000 0x0 0x96>;
};
usb_1_hsphy: phy@8902000 {
compatible = "qcom,sc8280xp-usb-hs-phy",
"qcom,usb-snps-hs-5nm-phy";

7
arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts
View File

@@ -404,11 +404,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm670/sargo/a615_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm670/sargo/a615_zap.mbn";
};
&i2c9 {

14
arch/arm64/boot/dts/qcom/sdm670.dtsi
View File

@@ -1124,6 +1124,12 @@
};
};
refgen: regulator@ff1000 {
compatible = "qcom,sdm670-refgen-regulator",
"qcom,sdm845-refgen-regulator";
reg = <0x0 0x00ff1000 0x0 0x60>;
};
mem_noc: interconnect@1380000 {
compatible = "qcom,sdm670-mem-noc";
reg = <0 0x01380000 0 0x27200>;
@@ -1376,6 +1382,10 @@
status = "disabled";
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -1926,6 +1936,8 @@
phys = <&mdss_dsi0_phy>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;
@@ -2000,6 +2012,8 @@
phys = <&mdss_dsi1_phy>;
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;

8
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@@ -455,10 +455,10 @@
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
&i2c10 {

21
arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
View File

@@ -99,26 +99,15 @@
no-map;
};
/* rmtfs lower guard */
memory@f0800000 {
reg = <0 0xf0800000 0 0x1000>;
no-map;
};
rmtfs_mem: memory@f0801000 {
rmtfs_mem: rmtfs-region@f0800000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xf0801000 0 0x200000>;
reg = <0 0xf0800000 0 0x202000>;
qcom,use-guard-pages;
no-map;
qcom,client-id = <1>;
qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
};
/* rmtfs upper guard */
memory@f0a01000 {
reg = <0 0xf0a01000 0 0x1000>;
no-map;
};
};
gpio-keys {
@@ -467,10 +456,6 @@
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
};
};
&ipa {

6
arch/arm64/boot/dts/qcom/sdm845-lg-judyln.dts
View File

@@ -47,10 +47,8 @@
firmware-name = "qcom/sdm845/judyln/cdsp.mbn";
};
&gpu {
zap-shader {
firmware-name = "qcom/sdm845/judyln/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/judyln/a630_zap.mbn";
};
&mss_pil {

6
arch/arm64/boot/dts/qcom/sdm845-lg-judyp.dts
View File

@@ -33,10 +33,8 @@
firmware-name = "qcom/sdm845/judyp/cdsp.mbn";
};
&gpu {
zap-shader {
firmware-name = "qcom/sdm845/judyp/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/judyp/a630_zap.mbn";
};
&mss_pil {

7
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
View File

@@ -416,11 +416,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
&i2c10 {

146
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
View File

@@ -75,32 +75,20 @@
};
reserved-memory {
/*
* The rmtfs_mem needs to be guarded due to "XPU limitations"
* it is otherwise possible for an allocation adjacent to the
* rmtfs_mem region to trigger an XPU violation, causing a crash.
*/
rmtfs_lower_guard: rmtfs-lower-guard@f5b00000 {
no-map;
reg = <0 0xf5b00000 0 0x1000>;
};
/*
* The rmtfs memory region in downstream is 'dynamically allocated'
* but given the same address every time. Hard code it as this address is
* where the modem firmware expects it to be.
*/
rmtfs_mem: rmtfs-mem@f5b01000 {
rmtfs_mem: rmtfs-region@f5b00000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xf5b01000 0 0x200000>;
reg = <0 0xf5b00000 0 0x202000>;
qcom,use-guard-pages;
no-map;
qcom,client-id = <1>;
qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
};
rmtfs_upper_guard: rmtfs-upper-guard@f5d01000 {
no-map;
reg = <0 0xf5d01000 0 0x1000>;
};
/*
* It seems like reserving the old rmtfs_mem region is also needed to prevent
@@ -162,6 +150,34 @@
enable-active-high;
regulator-boot-on;
};
panel_vci_3v3: panel-vci-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "LCD_VCI_3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&panel_vci_default>;
pinctrl-names = "default";
regulator-boot-on;
};
panel_vddi_poc_1p8: panel-vddi-poc-regulator {
compatible = "regulator-fixed";
regulator-name = "VDDI_POC";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&panel_poc_default>;
pinctrl-names = "default";
regulator-boot-on;
};
};
&adsp_pas {
@@ -351,11 +367,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn";
};
&i2c10 {
@@ -429,11 +444,15 @@
reg = <0>;
vddio-supply = <&vreg_l14a_1p88>;
vci-supply = <&panel_vci_3v3>;
poc-supply = <&panel_vddi_poc_1p8>;
te-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;
pinctrl-0 = <&panel_default>;
pinctrl-1 = <&panel_sleep>;
pinctrl-names = "default", "sleep";
port {
panel_in: endpoint {
@@ -803,13 +822,73 @@
bias-disable;
};
tri_state_key_default: tri-state-key-default-state {
pins = "gpio40", "gpio42", "gpio26";
panel_vci_default: vci-state {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
panel_poc_default: poc-state {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
alert_slider_default: alert-slider-default-state {
pins = "gpio126", "gpio52", "gpio24";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
panel_default: panel-default-state {
esd-pins {
pins = "gpio30";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
reset-pins {
pins = "gpio6";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
te-pins {
pins = "gpio10";
function = "mdp_vsync";
drive-strength = <2>;
bias-disable;
};
};
panel_sleep: panel-sleep-state {
esd-pins {
pins = "gpio30";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
reset-pins {
pins = "gpio6";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
te-pins {
pins = "gpio10";
function = "mdp_vsync";
drive-strength = <2>;
bias-disable;
};
};
ts_default_pins: ts-int-state {
pins = "gpio99", "gpio125";
function = "gpio";
@@ -817,27 +896,6 @@
bias-pull-up;
};
panel_reset_pins: panel-reset-state {
pins = "gpio6", "gpio25", "gpio26";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
panel_te_pin: panel-te-state {
pins = "gpio10";
function = "mdp_vsync";
drive-strength = <2>;
bias-disable;
};
panel_esd_pin: panel-esd-state {
pins = "gpio30";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
speaker_default: speaker-default-state {
pins = "gpio69";
function = "gpio";

2
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts
View File

@@ -32,7 +32,7 @@
&display_panel {
status = "okay";
compatible = "samsung,s6e3fc2x01";
compatible = "samsung,s6e3fc2x01-ams641rw", "samsung,s6e3fc2x01";
};
&i2c4 {

23
arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts
View File

@@ -158,7 +158,7 @@
};
};
i2c21 {
i2c-21 {
compatible = "i2c-gpio";
sda-gpios = <&tlmm 127 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&tlmm 128 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -251,11 +251,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/starqltechn/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/starqltechn/a630_zap.mbn";
};
&mdss {
@@ -599,15 +598,15 @@
&i2c14 {
status = "okay";
pmic@66 {
max77705: pmic@66 {
compatible = "maxim,max77705";
reg = <0x66>;
#interrupt-cells = <1>;
interrupt-parent = <&pm8998_gpios>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
pinctrl-0 = <&pmic_int_default>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
leds {
compatible = "maxim,max77705-rgb";
@@ -646,8 +645,8 @@
reg = <0x69>;
compatible = "maxim,max77705-charger";
monitored-battery = <&battery>;
interrupt-parent = <&pm8998_gpios>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&max77705>;
interrupts = <0>;
};
fuel-gauge@36 {
@@ -655,8 +654,8 @@
compatible = "maxim,max77705-battery";
power-supplies = <&max77705_charger>;
maxim,rsns-microohm = <5000>;
interrupt-parent = <&pm8998_gpios>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&max77705>;
interrupts = <2>;
};
};

27
arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
View File

@@ -423,31 +423,29 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/axolotl/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/axolotl/a630_zap.mbn";
};
&i2c5 {
status = "okay";
touchscreen@38 {
compatible = "focaltech,fts8719";
compatible = "focaltech,ft5452";
reg = <0x38>;
wakeup-source;
interrupt-parent = <&tlmm>;
interrupts = <125 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&vreg_l28a_3p0>;
vcc-i2c-supply = <&vreg_l14a_1p88>;
pinctrl-names = "default", "suspend";
interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l28a_3p0>;
iovcc-supply = <&vreg_l14a_1p88>;
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-names = "default", "suspend";
reset-gpio = <&tlmm 99 GPIO_ACTIVE_HIGH>;
irq-gpio = <&tlmm 125 GPIO_TRANSITORY>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <2160>;
};
@@ -479,9 +477,6 @@
vdda-supply = <&vreg_l14a_1p88>;
vdd3p3-supply = <&vreg_l28a_3p0>;
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "sleep";

7
arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi
View File

@@ -426,11 +426,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/Sony/tama/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/Sony/tama/a630_zap.mbn";
};
&i2c5 {

7
arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
View File

@@ -246,11 +246,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/beryllium/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/beryllium/a630_zap.mbn";
};
&ibb {

7
arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
View File

@@ -392,11 +392,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/polaris/a630_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm845/polaris/a630_zap.mbn";
};
&ibb {

13
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@@ -2218,6 +2218,11 @@
};
};
refgen: regulator@ff1000 {
compatible = "qcom,sdm845-refgen-regulator";
reg = <0x0 0x00ff1000 0x0 0x60>;
};
llcc: system-cache-controller@1100000 {
compatible = "qcom,sdm845-llcc";
reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>,
@@ -4750,6 +4755,8 @@
phys = <&mdss_dsi0_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;
@@ -4824,6 +4831,8 @@
phys = <&mdss_dsi1_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;
@@ -4893,6 +4902,10 @@
status = "disabled";
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
gpu_opp_table: opp-table {
compatible = "operating-points-v2";

971
arch/arm64/boot/dts/qcom/sdm850-huawei-matebook-e-2019.dts Normal file
View File

@@ -0,0 +1,971 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Huawei MateBook E 2019
*
* Copyright (c) 2025, Jingzhou Zhu <newwheatzjz@zohomail.com>
*/
/dts-v1/;
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,wcd934x.h>
#include "sdm850.dtsi"
#include "sdm845-wcd9340.dtsi"
#include "pm8998.dtsi"
/*
* Update following upstream (sdm845.dtsi) reserved
* memory mappings for firmware loading to succeed
* and enable the IPA device.
*/
/delete-node/ &tz_mem;
/delete-node/ &rmtfs_mem;
/delete-node/ &qseecom_mem;
/delete-node/ &ipa_fw_mem;
/delete-node/ &ipa_gsi_mem;
/delete-node/ &gpu_mem;
/delete-node/ &adsp_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &slpi_mem;
/ {
model = "Huawei MateBook E 2019";
compatible = "huawei,planck", "qcom,sdm845";
chassis-type = "convertible";
aliases {
serial0 = &uart9;
serial1 = &uart6;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&volume_up_gpio &mode_pin_active>;
pinctrl-names = "default";
key-vol-up {
label = "Volume up";
gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <15>;
wakeup-source;
};
switch-mode {
label = "Tablet mode switch";
gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>;
linux,input-type = <EV_SW>;
linux,code = <SW_TABLET_MODE>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&cam_indicator_en>;
pinctrl-names = "default";
led: led-camera-indicator {
label = "white:camera-indicator";
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_WHITE>;
gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
/* Reuse as a panic indicator until we get a "camera on" trigger */
panic-indicator;
};
};
sw_edp_1p2: regulator-edp-1p2 {
compatible = "regulator-fixed";
regulator-name = "sw_edp_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
pinctrl-0 = <&sw_edp_1p2_en>;
pinctrl-names = "default";
gpio = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vreg_l2a_1p2>;
};
vlcm_3v3: regulator-vlcm-3v3 {
compatible = "regulator-fixed";
regulator-name = "vlcm_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vph_pwr>;
};
vph_pwr: regulator-vph-pwr {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
};
reserved-memory {
cont_splash_mem: framebuffer@80100000 {
reg = <0 0x80100000 0 0xd00000>;
no-map;
};
tz_mem: tz@86d00000 {
reg = <0 0x86d00000 0 0x4600000>;
no-map;
};
qseecom_mem: qseecom@8b500000 {
reg = <0 0x8b500000 0 0xa00000>;
no-map;
};
wlan_msa_mem: wlan-msa@8c400000 {
reg = <0 0x8c400000 0 0x100000>;
no-map;
};
adsp_mem: adsp@8c500000 {
reg = <0 0x8c500000 0 0x1a00000>;
no-map;
};
ipa_fw_mem: ipa-fw@8df00000 {
reg = <0 0x8df00000 0 0x100000>;
no-map;
};
slpi_mem: slpi@96700000 {
reg = <0 0x96700000 0 0x1200000>;
};
gpu_mem: gpu@97900000 {
reg = <0 0x97900000 0 0x5000>;
no-map;
};
rmtfs_mem: rmtfs@97c00000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0x97c00000 0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
};
};
sn65dsi86_refclk: sn65dsi86-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
};
&adsp_pas {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qcadsp850.mbn";
status = "okay";
};
&apps_rsc {
regulators-0 {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-s11-supply = <&vph_pwr>;
vdd-s12-supply = <&vph_pwr>;
vdd-s13-supply = <&vph_pwr>;
vdd-l1-l27-supply = <&vreg_s7a_1p025>;
vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
vdd-l3-l11-supply = <&vreg_s7a_1p025>;
vdd-l4-l5-supply = <&vreg_s7a_1p025>;
vdd-l6-supply = <&vph_pwr>;
vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
vdd-l26-supply = <&vreg_s3a_1p35>;
vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
vreg_s2a_1p125: smps2 {
};
vreg_s3a_1p35: smps3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s4a_1p8: smps4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s5a_2p04: smps5 {
regulator-min-microvolt = <2040000>;
regulator-max-microvolt = <2040000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s6a_0p8: smps6 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s7a_1p025: smps7 {
regulator-min-microvolt = <1028000>;
regulator-max-microvolt = <1028000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdd_qusb_hs0:
vdda_hp_pcie_core:
vdda_mipi_csi0_0p9:
vdda_mipi_csi1_0p9:
vdda_mipi_csi2_0p9:
vdda_mipi_dsi0_pll:
vdda_mipi_dsi1_pll:
vdda_qlink_lv:
vdda_qlink_lv_ck:
vdda_qrefs_0p875:
vdda_pcie_core:
vdda_pll_cc_ebi01:
vdda_pll_cc_ebi23:
vdda_sp_sensor:
vdda_ufs1_core:
vdda_ufs2_core:
vdda_usb1_ss_core:
vdda_usb2_ss_core:
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_10:
vreg_l2a_1p2: ldo2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l3a_1p0: ldo3 {
};
vdd_wcss_cx:
vdd_wcss_mx:
vdda_wcss_pll:
vreg_l5a_0p8: ldo5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_13:
vreg_l6a_1p8: ldo6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8a_1p2: ldo8 {
};
vreg_l9a_1p8: ldo9 {
};
vreg_l10a_1p8: ldo10 {
};
vreg_l11a_1p0: ldo11 {
};
vdd_qfprom:
vdd_qfprom_sp:
vdda_apc1_cs_1p8:
vdda_gfx_cs_1p8:
vdda_qrefs_1p8:
vdda_qusb_hs0_1p8:
vddpx_11:
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_2:
vreg_l13a_2p95: ldo13 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14a_1p88: ldo14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l15a_1p8: ldo15 {
};
vreg_l16a_2p7: ldo16 {
};
vreg_l17a_1p3: ldo17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l18a_2p7: ldo18 {
};
vreg_l19a_3p0: ldo19 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l20a_2p95: ldo20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l21a_2p95: ldo21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l22a_2p85: ldo22 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l23a_3p3: ldo23 {
};
vdda_qusb_hs0_3p1:
vreg_l24a_3p075: ldo24 {
/* 3075000 uV causes -ENOTRECOVERABLE error */
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l25a_3p3: ldo25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdda_hp_pcie_1p2:
vdda_hv_ebi0:
vdda_hv_ebi1:
vdda_hv_ebi2:
vdda_hv_ebi3:
vdda_mipi_csi_1p25:
vdda_mipi_dsi0_1p2:
vdda_mipi_dsi1_1p2:
vdda_pcie_1p2:
vdda_ufs1_1p2:
vdda_ufs2_1p2:
vdda_usb1_ss_1p2:
vdda_usb2_ss_1p2:
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l28a_3p0: ldo28 {
/* 3300000 uV causes -ENOTRECOVERABLE error */
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
regulators-1 {
compatible = "qcom,pm8005-rpmh-regulators";
qcom,pmic-id = "c";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vreg_s2c_0p752: smps2 {
regulator-min-microvolt = <752000>;
regulator-max-microvolt = <752000>;
};
};
};
&cci_i2c0 {
/* chipnext,cn3927e vcm@0xc */
/* samsung,s5k3l6 camera@0x10 */
/* eeprom@0x50 */
};
&cci_i2c1 {
/* galaxycore,gc5025 camera@0x36 */
/* eeprom@0x50 */
};
&cdsp_pas {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qccdsp850.mbn";
status = "okay";
};
&crypto {
/* FIXME: qce_start triggers an SError */
status = "disabled";
};
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gpu {
status = "okay";
};
&gpu_zap_shader {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qcdxkmsuc850.mbn";
};
&i2c5 {
clock-frequency = <400000>;
status = "okay";
touchscreen: hid@5d {
compatible = "hid-over-i2c";
reg = <0x5d>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&i2c5_hid_active>;
pinctrl-names = "default";
wakeup-source;
};
};
&i2c7 {
/* ec@0x76 */
};
&i2c10 {
clock-frequency = <400000>;
status = "okay";
sn65dsi86: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
pinctrl-0 = <&sn65dsi86_pin_active>;
pinctrl-names = "default";
enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
vcca-supply = <&sw_edp_1p2>;
vcc-supply = <&sw_edp_1p2>;
vpll-supply = <&vreg_l14a_1p88>;
vccio-supply = <&vreg_l14a_1p88>;
clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";
no-hpd;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
compatible = "innolux,p120zdg-bf1";
power-supply = <&vlcm_3v3>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
};
&ipa {
qcom,gsi-loader = "self";
memory-region = <&ipa_fw_mem>;
firmware-name = "qcom/sdm850/HUAWEI/AL09/ipa_fws.elf";
status = "okay";
};
&mdss {
status = "okay";
};
&mdss_dsi0 {
vdda-supply = <&vdda_mipi_dsi0_1p2>;
status = "okay";
};
&mdss_dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vdds-supply = <&vdda_mipi_dsi0_pll>;
status = "okay";
};
&mss_pil {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qcdsp1v2850.mbn",
"qcom/sdm850/HUAWEI/AL09/qcdsp2850.mbn";
status = "okay";
};
&pm8998_gpios {
sw_edp_1p2_en: sw-edp-1p2-en-state {
pins = "gpio9";
function = "normal";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
volume_up_gpio: volume-up-gpio-state {
pins = "gpio6";
function = "normal";
input-enable;
bias-pull-up;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
};
&pm8998_pwrkey {
status = "okay";
};
&pm8998_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&q6asmdai {
dai@0 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
dai@1 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
dai@2 {
reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
&sdhc_2 {
pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
pinctrl-names = "default";
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vddpx_2>;
bus-width = <4>;
cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&slpi_pas {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qcslpi850.mbn";
status = "okay";
};
&sound {
compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard";
model = "HUAWEI-PAK_AL09-M1040";
audio-routing = "RX_BIAS", "MCLK",
"AMIC2", "MIC BIAS2",
"DMIC0", "MCLK",
"DMIC0", "MIC BIAS1",
"DMIC2", "MCLK",
"DMIC2", "MIC BIAS3",
"SpkrLeft IN", "SPK1 OUT",
"SpkrRight IN", "SPK2 OUT";
mm1-dai-link {
link-name = "MultiMedia1";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
};
mm2-dai-link {
link-name = "MultiMedia2";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
};
mm3-dai-link {
link-name = "MultiMedia3";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
slim-dai-link {
link-name = "SLIM Playback";
codec {
sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 AIF1_PB>;
};
cpu {
sound-dai = <&q6afedai SLIMBUS_0_RX>;
};
platform {
sound-dai = <&q6routing>;
};
};
slimcap-dai-link {
link-name = "SLIM Capture";
codec {
sound-dai = <&wcd9340 AIF1_CAP>;
};
cpu {
sound-dai = <&q6afedai SLIMBUS_0_TX>;
};
platform {
sound-dai = <&q6routing>;
};
};
slim-wcd-dai-link {
link-name = "SLIM WCD Playback";
codec {
sound-dai = <&wcd9340 AIF2_PB>;
};
cpu {
sound-dai = <&q6afedai SLIMBUS_1_RX>;
};
platform {
sound-dai = <&q6routing>;
};
};
};
&tlmm {
gpio-reserved-ranges = <0 4>, /* Unused */
<81 4>; /* SPI (fingerprint reader) */
cam_indicator_en: cam-indicator-en-state {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
i2c5_hid_active: i2c5-hid-active-state {
pins = "gpio125";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
mode_pin_active: mode-pin-state {
pins = "gpio79";
function = "gpio";
bias-disable;
};
sdc2_default_state: sdc2-default-state {
clk-pins {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};
cmd-pins {
pins = "sdc2_cmd";
drive-strength = <16>;
bias-pull-up;
};
data-pins {
pins = "sdc2_data";
drive-strength = <16>;
bias-pull-up;
};
};
sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio126";
function = "gpio";
bias-pull-up;
};
sn65dsi86_pin_active: sn65dsi86-enable-state {
pins = "gpio96";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};
&uart6 {
pinctrl-0 = <&qup_uart6_4pin>;
pinctrl-names = "default";
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
vddch1-supply = <&vreg_l23a_3p3>;
max-speed = <3200000>;
};
};
&uart9 {
status = "okay";
};
&ufs_mem_hc {
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l20a_2p95>;
vcc-max-microamp = <600000>;
status = "okay";
};
&ufs_mem_phy {
vdda-phy-supply = <&vdda_ufs1_core>;
vdda-pll-supply = <&vdda_ufs1_1p2>;
status = "okay";
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "host";
};
&usb_1_hsphy {
vdd-supply = <&vdda_usb1_ss_core>;
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
status = "okay";
};
&usb_1_qmpphy {
vdda-phy-supply = <&vdda_usb1_ss_1p2>;
vdda-pll-supply = <&vdda_usb1_ss_core>;
status = "okay";
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "host";
};
&usb_2_hsphy {
vdd-supply = <&vdda_usb2_ss_core>;
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
status = "okay";
};
&usb_2_qmpphy {
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
status = "okay";
};
&venus {
firmware-name = "qcom/sdm850/HUAWEI/AL09/qcvss850.mbn";
status = "okay";
};
&wcd9340 {
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
vdd-tx-supply = <&vreg_s4a_1p8>;
vdd-rx-supply = <&vreg_s4a_1p8>;
vdd-io-supply = <&vreg_s4a_1p8>;
qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000
500000 500000 500000 500000>;
qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <2700000>;
qcom,micbias3-microvolt = <1800000>;
swm: soundwire@c85 {
left_spkr: speaker@0,3 {
compatible = "sdw10217211000";
reg = <0 3>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrLeft";
#sound-dai-cells = <0>;
};
right_spkr: speaker@0,4 {
compatible = "sdw10217211000";
reg = <0 4>;
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
sound-name-prefix = "SpkrRight";
#sound-dai-cells = <0>;
};
};
};
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
qcom,snoc-host-cap-8bit-quirk;
qcom,calibration-variant = "Huawei_Planck";
status = "okay";
};

9
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
View File

@@ -356,11 +356,10 @@
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm850/LENOVO/81JL/qcdxkmsuc850.mbn";
};
status = "okay";};
&gpu_zap_shader {
firmware-name = "qcom/sdm850/LENOVO/81JL/qcdxkmsuc850.mbn";
};
&i2c1 {

6
arch/arm64/boot/dts/qcom/sdx75-idp.dts
View File

@@ -337,11 +337,9 @@
};
&usb {
status = "okay";
};
&usb_dwc3 {
dr_mode = "peripheral";
status = "okay";
};
&usb_hsphy {

68
arch/arm64/boot/dts/qcom/sdx75.dtsi
View File

@@ -1019,12 +1019,9 @@
};
};
usb: usb@a6f8800 {
compatible = "qcom,sdx75-dwc3", "qcom,dwc3";
reg = <0x0 0x0a6f8800 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
usb: usb@a600000 {
compatible = "qcom,sdx75-dwc3", "qcom,snps-dwc3";
reg = <0x0 0x0a600000 0x0 0xfc100>;
clocks = <&gcc GCC_USB30_SLV_AHB_CLK>,
<&gcc GCC_USB30_MASTER_CLK>,
@@ -1041,21 +1038,35 @@
<&gcc GCC_USB30_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 9 IRQ_TYPE_EDGE_RISING>,
<&pdc 10 IRQ_TYPE_EDGE_RISING>,
<&pdc 9 IRQ_TYPE_EDGE_RISING>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"hs_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
iommus = <&apps_smmu 0x80 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
power-domains = <&gcc GCC_USB30_GDSC>;
resets = <&gcc GCC_USB30_BCR>;
phys = <&usb_hsphy>,
<&usb_qmpphy>;
phy-names = "usb2-phy",
"usb3-phy";
interconnects = <&system_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
@@ -1063,38 +1074,25 @@
interconnect-names = "usb-ddr",
"apps-usb";
usb-role-switch;
status = "disabled";
usb_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0x0 0x0a600000 0x0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0x80 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
phys = <&usb_hsphy>,
<&usb_qmpphy>;
phy-names = "usb2-phy",
"usb3-phy";
ports {
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port@0 {
reg = <0>;
usb_1_dwc3_hs: endpoint {
};
usb_1_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
};
usb_1_dwc3_ss: endpoint {
};
};
};

6
arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts
View File

@@ -121,10 +121,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn";
};
&i2c1 {

2
arch/arm64/boot/dts/qcom/sm6115.dtsi
View File

@@ -1745,7 +1745,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};

6
arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
View File

@@ -67,10 +67,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
};
&mdss {

59
arch/arm64/boot/dts/qcom/sm6350.dtsi
View File

@@ -1175,18 +1175,47 @@
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
freq-table-hz =
<50000000 200000000>,
<0 0>,
<0 0>,
<37500000 150000000>,
<75000000 300000000>,
<0 0>,
<0 0>,
<0 0>,
<0 0>;
operating-points-v2 = <&ufs_opp_table>;
interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "ufs-ddr",
"cpu-ufs";
status = "disabled";
ufs_opp_table: opp-table {
compatible = "operating-points-v2";
opp-50000000 {
opp-hz = /bits/ 64 <50000000>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <37500000>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <150000000>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <0>,
/bits/ 64 <300000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
};
ufs_mem_phy: phy@1d87000 {
@@ -1768,6 +1797,12 @@
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
};
refgen: regulator@88e7000 {
compatible = "qcom,sm6350-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x088e7000 0x0 0x84>;
};
usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sm6350-qmp-usb3-dp-phy";
reg = <0x0 0x088e8000 0x0 0x3000>;
@@ -2158,6 +2193,8 @@
power-domains = <&dispcc MDSS_GDSC>;
iommus = <&apps_smmu 0x800 0x2>;
resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -2360,6 +2397,8 @@
phys = <&mdss_dsi0_phy>;
phy-names = "dsi";
refgen-supply = <&refgen>;
#address-cells = <1>;
#size-cells = <0>;

6
arch/arm64/boot/dts/qcom/sm6375.dtsi
View File

@@ -971,6 +971,12 @@
status = "disabled";
};
refgen: regulator@162f000 {
compatible = "qcom,sm6375-refgen-regulator",
"qcom,sm8250-refgen-regulator";
reg = <0x0 0x0162f000 0x0 0x84>;
};
spmi_bus: spmi@1c40000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x01c40000 0 0x1100>,

5
arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
View File

@@ -978,6 +978,11 @@
status = "okay";
};
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
};
&mdss {
status = "okay";
};

2
arch/arm64/boot/dts/qcom/sm7325.dtsi
View File

@@ -4,7 +4,7 @@
* Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com>
*/
#include "sc7280.dtsi"
#include "kodiak.dtsi"
/* SM7325 uses Kryo 670 */
&cpu0 { compatible = "qcom,kryo670"; };

12
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@@ -2255,7 +2255,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
@@ -3469,6 +3469,12 @@
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
refgen: regulator@88e7000 {
compatible = "qcom,sm8150-refgen-regulator",
"qcom,sdm845-refgen-regulator";
reg = <0x0 0x088e7000 0x0 0x60>;
};
usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sm8150-qmp-usb3-dp-phy";
reg = <0 0x088e8000 0 0x3000>;
@@ -3992,6 +3998,8 @@
phys = <&mdss_dsi0_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;
@@ -4085,6 +4093,8 @@
phys = <&mdss_dsi1_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;

7
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
View File

@@ -484,11 +484,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sm8250/a650_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8250/a650_zap.mbn";
};
&i2c1 {

3
arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi
View File

@@ -159,7 +159,8 @@
};
&tlmm {
gpio-reserved-ranges = <40 4>; /* I2C (Unused) */
gpio-reserved-ranges = <20 4>, /* SPI (fingerprint scanner) */
<40 4>; /* Unused */
};
&usb_1 {

7
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi
View File

@@ -554,11 +554,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sm8250/xiaomi/elish/a650_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8250/xiaomi/elish/a650_zap.mbn";
};
&i2c0 {

7
arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts
View File

@@ -424,11 +424,10 @@
&gpu {
status = "okay";
};
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sm8250/xiaomi/pipa/a650_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8250/xiaomi/pipa/a650_zap.mbn";
};
&i2c11 {

13
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@@ -2944,7 +2944,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&gpu_mem>;
};
@@ -3901,6 +3901,11 @@
resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
};
refgen: regulator@88e7000 {
compatible = "qcom,sm8250-refgen-regulator";
reg = <0x0 0x088e7000 0x0 0x84>;
};
usb_1_qmpphy: phy@88e8000 {
compatible = "qcom,sm8250-qmp-usb3-dp-phy";
reg = <0 0x088e8000 0 0x3000>;
@@ -4679,6 +4684,8 @@
iommus = <&apps_smmu 0x820 0x402>;
resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
status = "disabled";
#address-cells = <2>;
@@ -4873,6 +4880,8 @@
phys = <&mdss_dsi0_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;
@@ -4967,6 +4976,8 @@
phys = <&mdss_dsi1_phy>;
refgen-supply = <&refgen>;
status = "disabled";
#address-cells = <1>;

6
arch/arm64/boot/dts/qcom/sm8350-hdk.dts
View File

@@ -403,10 +403,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/sm8350/a660_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8350/a660_zap.mbn";
};
&i2c13 {

2
arch/arm64/boot/dts/qcom/sm8350.dtsi
View File

@@ -2051,7 +2051,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&pil_gpu_mem>;
};

6
arch/arm64/boot/dts/qcom/sm8450-hdk.dts
View File

@@ -643,10 +643,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/sm8450/a730_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8450/a730_zap.mbn";
};
&i2c9 {

57
arch/arm64/boot/dts/qcom/sm8450.dtsi
View File

@@ -2047,25 +2047,28 @@
pcie0_opp_table: opp-table {
compatible = "operating-points-v2";
/* GEN 1 x1 */
/* 2.5 GT/s x1 */
opp-2500000 {
opp-hz = /bits/ 64 <2500000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <250000 1>;
opp-level = <1>;
};
/* GEN 2 x1 */
/* 5 GT/s x1 */
opp-5000000 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
opp-level = <2>;
};
/* GEN 3 x1 */
/* 8 GT/s x1 */
opp-8000000 {
opp-hz = /bits/ 64 <8000000>;
required-opps = <&rpmhpd_opp_nom>;
opp-peak-kBps = <984500 1>;
opp-level = <3>;
};
};
@@ -2209,46 +2212,68 @@
pcie1_opp_table: opp-table {
compatible = "operating-points-v2";
/* GEN 1 x1 */
opp-2500000 {
/* 2.5 GT/s x1 */
opp-2500000-1 {
opp-hz = /bits/ 64 <2500000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <250000 1>;
opp-level = <1>;
};
/* GEN 1 x2 and GEN 2 x1 */
opp-5000000 {
/* 2.5 GT/s x2 */
opp-5000000-1 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
opp-level = <1>;
};
/* GEN 2 x2 */
opp-10000000 {
/* 5 GT/s x1 */
opp-5000000-2 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
opp-level = <2>;
};
/* 5 GT/s x2 */
opp-10000000-2 {
opp-hz = /bits/ 64 <10000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <1000000 1>;
opp-level = <2>;
};
/* GEN 3 x1 */
opp-8000000 {
/* 8 GT/s x1 */
opp-8000000-3 {
opp-hz = /bits/ 64 <8000000>;
required-opps = <&rpmhpd_opp_nom>;
opp-peak-kBps = <984500 1>;
opp-level = <3>;
};
/* GEN 3 x2 and GEN 4 x1 */
opp-16000000 {
/* 8 GT/s x2 */
opp-16000000-3 {
opp-hz = /bits/ 64 <16000000>;
required-opps = <&rpmhpd_opp_nom>;
opp-peak-kBps = <1969000 1>;
opp-level = <3>;
};
/* GEN 4 x2 */
opp-32000000 {
/* 16 GT/s x1 */
opp-16000000-4 {
opp-hz = /bits/ 64 <16000000>;
required-opps = <&rpmhpd_opp_nom>;
opp-peak-kBps = <1969000 1>;
opp-level = <4>;
};
/* 16 GT/s x2 */
opp-32000000-4 {
opp-hz = /bits/ 64 <32000000>;
required-opps = <&rpmhpd_opp_nom>;
opp-peak-kBps = <3938000 1>;
opp-level = <4>;
};
};
@@ -2434,7 +2459,7 @@
status = "disabled";
zap-shader {
gpu_zap_shader: zap-shader {
memory-region = <&gpu_micro_code_mem>;
};

91
arch/arm64/boot/dts/qcom/sm8550-hdk-rear-camera-card.dtso Normal file
View File

@@ -0,0 +1,91 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* SM8550-HDK Rear Camera Card overlay
*
* Copyright (c) 2025, Linaro Limited
*/
#include <dt-bindings/clock/qcom,sm8550-camcc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/dts-v1/;
/plugin/;
&camss {
status = "okay";
vdda-phy-supply = <&vreg_l1e_0p88>;
vdda-pll-supply = <&vreg_l3e_1p2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@3 {
reg = <3>;
csiphy3_ep: endpoint {
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&cam_tele>;
};
};
};
};
&cci1 {
status = "okay";
};
&cci1_i2c0 {
#address-cells = <1>;
#size-cells = <0>;
sensor@10 {
compatible = "samsung,s5k3m5";
reg = <0x10>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>;
assigned-clock-rates = <24000000>;
reset-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&cam3_default>;
pinctrl-names = "default";
afvdd-supply = <&vreg_l7n_2p96>;
avdd-supply = <&vreg_l4m_2p8>;
dovdd-supply = <&vreg_l5n_1p8>;
dvdd-supply = <&vreg_l2m_1p056>;
port {
cam_tele: endpoint {
link-frequencies = /bits/ 64 <602500000>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&csiphy3_ep>;
};
};
};
};
&pm8550_flash {
status = "okay";
led-0 {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_YELLOW>;
led-sources = <1>, <4>;
led-max-microamp = <500000>;
flash-max-microamp = <2000000>;
flash-max-timeout-us = <1280000>;
function-enumerator = <0>;
};
led-1 {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
led-sources = <2>, <3>;
led-max-microamp = <500000>;
flash-max-microamp = <2000000>;
flash-max-timeout-us = <1280000>;
function-enumerator = <1>;
};
};

6
arch/arm64/boot/dts/qcom/sm8550-hdk.dts
View File

@@ -955,10 +955,10 @@
&gpu {
status = "okay";
};
zap-shader {
firmware-name = "qcom/sm8550/a740_zap.mbn";
};
&gpu_zap_shader {
firmware-name = "qcom/sm8550/a740_zap.mbn";
};
&lpass_tlmm {

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