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drm/i915/gvt: introduce a new flag F_CMD_WRITE_PATCH
F_CMD_WRITE_PATCH means command write to this register needs to be patched Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Yan Zhao <yan.y.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20201223034553.17272-1-yan.y.zhao@intel.com Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@@ -261,6 +261,8 @@ struct intel_gvt_mmio {
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* logical context image
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*/
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#define F_SR_IN_CTX (1 << 7)
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/* Value of command write of this reg needs to be patched */
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#define F_CMD_WRITE_PATCH (1 << 8)
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struct gvt_mmio_block *mmio_block;
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unsigned int num_mmio_block;
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@@ -685,6 +687,35 @@ static inline void intel_gvt_mmio_set_sr_in_ctx(
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}
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void intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu);
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/**
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* intel_gvt_mmio_set_cmd_write_patch -
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* mark an MMIO if its cmd write needs to be
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* patched
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* @gvt: a GVT device
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* @offset: register offset
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*
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*/
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static inline void intel_gvt_mmio_set_cmd_write_patch(
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struct intel_gvt *gvt, unsigned int offset)
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{
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gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_WRITE_PATCH;
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}
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/**
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* intel_gvt_mmio_is_cmd_write_patch - check if an mmio's cmd access needs to
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* be patched
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* @gvt: a GVT device
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* @offset: register offset
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*
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* Returns:
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* True if GPU commmand write to an MMIO should be patched
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*/
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static inline bool intel_gvt_mmio_is_cmd_write_patch(
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struct intel_gvt *gvt, unsigned int offset)
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{
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return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_WRITE_PATCH;
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}
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void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu);
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void intel_gvt_debugfs_init(struct intel_gvt *gvt);
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void intel_gvt_debugfs_clean(struct intel_gvt *gvt);
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