dt-bindings: iio: accel: bosch,bma220 setup SPI clock mode

Assert CPOL for a high-idle clock signal and CPHA for sampling on the
trailing (rising) edge.

Quoting from the datasheet:

 "During the transitions on CSB, SCK must be high. SDI and SDO are driven
 at the falling edge of SCK and should be captured at the rising edge of
 SCK."

The sensor does not function with the default SPI clock mode.

Fixes: 7dbd479425 ("dt-bindings:iio:accel:bosch,bma220 device tree binding documentation")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Petre Rodan <petre.rodan@subdimension.ro>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Petre Rodan
2025-09-13 18:39:23 +03:00
committed by Jonathan Cameron
parent b8af83efd6
commit b8719569a0

View File

@@ -20,6 +20,9 @@ properties:
interrupts:
maxItems: 1
spi-cpha: true
spi-cpol: true
vdda-supply: true
vddd-supply: true
vddio-supply: true
@@ -44,6 +47,8 @@ examples:
compatible = "bosch,bma220";
reg = <0>;
spi-max-frequency = <2500000>;
spi-cpol;
spi-cpha;
interrupt-parent = <&gpio0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};