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drm/panthor: Add arch-specific panthor_hw binding
This patch adds the framework for binding to a specific panthor_hw structure based on the architecture major value parsed from the GPU_ID register. This is in preparation of enabling architecture-specific behaviours based on GPU_ID. As such, it also splits the GPU_ID register read operation into its own helper function. This framework allows a single panthor_hw structure to be shared across multiple architectures should there be minimal changes between them via the arch_min and arch_max field of the panthor_hw_entry structure, instead of duplicating the structure across multiple architectures. Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Karunika Choo <karunika.choo@arm.com> Link: https://patch.msgid.link/20251125125548.3282320-2-karunika.choo@arm.com Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
This commit is contained in:
committed by
Boris Brezillon
parent
ce04ec03a9
commit
b1075ae1a3
@@ -24,6 +24,7 @@ struct panthor_device;
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struct panthor_gpu;
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struct panthor_group_pool;
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struct panthor_heap_pool;
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struct panthor_hw;
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struct panthor_job;
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struct panthor_mmu;
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struct panthor_fw;
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@@ -134,6 +135,9 @@ struct panthor_device {
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/** @csif_info: Command stream interface information. */
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struct drm_panthor_csif_info csif_info;
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/** @hw: GPU-specific data. */
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struct panthor_hw *hw;
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/** @gpu: GPU management data. */
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struct panthor_gpu *gpu;
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@@ -10,6 +10,28 @@
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#define GPU_PROD_ID_MAKE(arch_major, prod_major) \
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(((arch_major) << 24) | (prod_major))
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/** struct panthor_hw_entry - HW arch major to panthor_hw binding entry */
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struct panthor_hw_entry {
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/** @arch_min: Minimum supported architecture major value (inclusive) */
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u8 arch_min;
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/** @arch_max: Maximum supported architecture major value (inclusive) */
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u8 arch_max;
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/** @hwdev: Pointer to panthor_hw structure */
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struct panthor_hw *hwdev;
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};
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static struct panthor_hw panthor_hw_arch_v10 = {};
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static struct panthor_hw_entry panthor_hw_match[] = {
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{
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.arch_min = 10,
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.arch_max = 13,
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.hwdev = &panthor_hw_arch_v10,
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},
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};
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static char *get_gpu_model_name(struct panthor_device *ptdev)
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{
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const u32 gpu_id = ptdev->gpu_info.gpu_id;
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@@ -64,7 +86,6 @@ static void panthor_gpu_info_init(struct panthor_device *ptdev)
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{
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unsigned int i;
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ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
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ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID);
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ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID);
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ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES);
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@@ -119,8 +140,50 @@ static void panthor_hw_info_init(struct panthor_device *ptdev)
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ptdev->gpu_info.tiler_present);
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}
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static int panthor_hw_bind_device(struct panthor_device *ptdev)
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{
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struct panthor_hw *hdev = NULL;
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const u32 arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
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int i = 0;
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for (i = 0; i < ARRAY_SIZE(panthor_hw_match); i++) {
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struct panthor_hw_entry *entry = &panthor_hw_match[i];
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if (arch_major >= entry->arch_min && arch_major <= entry->arch_max) {
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hdev = entry->hwdev;
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break;
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}
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}
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if (!hdev)
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return -EOPNOTSUPP;
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ptdev->hw = hdev;
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return 0;
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}
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static int panthor_hw_gpu_id_init(struct panthor_device *ptdev)
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{
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ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
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if (!ptdev->gpu_info.gpu_id)
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return -ENXIO;
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return 0;
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}
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int panthor_hw_init(struct panthor_device *ptdev)
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{
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int ret = 0;
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ret = panthor_hw_gpu_id_init(ptdev);
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if (ret)
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return ret;
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ret = panthor_hw_bind_device(ptdev);
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if (ret)
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return ret;
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panthor_hw_info_init(ptdev);
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return 0;
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@@ -6,6 +6,12 @@
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struct panthor_device;
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/**
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* struct panthor_hw - GPU specific register mapping and functions
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*/
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struct panthor_hw {
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};
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int panthor_hw_init(struct panthor_device *ptdev);
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#endif /* __PANTHOR_HW_H__ */
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