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interconnect: qcom: qcs615: convert to dynamic IDs

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Stop using fixed and IDs and covert the platform to use dynamic IDs for
the interconnect. This gives more flexibility and also allows us to drop
the .num_links member, saving from possible errors related to it being
not set or set incorrectly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251031-rework-icc-v3-8-0575304c9624@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2025-10-31 16:45:24 +02:00
committed by Georgi Djakov
parent 793cfcd1d6
commit b01058dfae
2 changed files with 239 additions and 408 deletions
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519
drivers/interconnect/qcom/qcs615.c
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128
drivers/interconnect/qcom/qcs615.h
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@@ -1,128 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DRIVERS_INTERCONNECT_QCOM_QCS615_H
#define __DRIVERS_INTERCONNECT_QCOM_QCS615_H
#define QCS615_MASTER_A1NOC_CFG 1
#define QCS615_MASTER_A1NOC_SNOC 2
#define QCS615_MASTER_ANOC_PCIE_SNOC 3
#define QCS615_MASTER_APPSS_PROC 4
#define QCS615_MASTER_BLSP_1 5
#define QCS615_MASTER_CAMNOC_HF0 6
#define QCS615_MASTER_CAMNOC_HF0_UNCOMP 7
#define QCS615_MASTER_CAMNOC_HF1 8
#define QCS615_MASTER_CAMNOC_HF1_UNCOMP 9
#define QCS615_MASTER_CAMNOC_SF 10
#define QCS615_MASTER_CAMNOC_SF_UNCOMP 11
#define QCS615_MASTER_CNOC_A2NOC 12
#define QCS615_MASTER_CNOC_DC_NOC 13
#define QCS615_MASTER_CNOC_MNOC_CFG 14
#define QCS615_MASTER_CRYPTO 15
#define QCS615_MASTER_EMAC_EVB 16
#define QCS615_MASTER_GEM_NOC_CFG 17
#define QCS615_MASTER_GEM_NOC_PCIE_SNOC 18
#define QCS615_MASTER_GEM_NOC_SNOC 19
#define QCS615_MASTER_GFX3D 20
#define QCS615_MASTER_GIC 21
#define QCS615_MASTER_GPU_TCU 22
#define QCS615_MASTER_IPA 23
#define QCS615_MASTER_IPA_CORE 24
#define QCS615_MASTER_LLCC 25
#define QCS615_MASTER_LPASS_ANOC 26
#define QCS615_MASTER_MDP0 27
#define QCS615_MASTER_MNOC_HF_MEM_NOC 28
#define QCS615_MASTER_MNOC_SF_MEM_NOC 29
#define QCS615_MASTER_PCIE 30
#define QCS615_MASTER_PIMEM 31
#define QCS615_MASTER_QDSS_BAM 32
#define QCS615_MASTER_QDSS_DAP 33
#define QCS615_MASTER_QDSS_ETR 34
#define QCS615_MASTER_QSPI 35
#define QCS615_MASTER_QUP_0 36
#define QCS615_MASTER_ROTATOR 37
#define QCS615_MASTER_SDCC_1 38
#define QCS615_MASTER_SDCC_2 39
#define QCS615_MASTER_SNOC_CFG 40
#define QCS615_MASTER_SNOC_CNOC 41
#define QCS615_MASTER_SNOC_GC_MEM_NOC 42
#define QCS615_MASTER_SNOC_SF_MEM_NOC 43
#define QCS615_MASTER_SPDM 44
#define QCS615_MASTER_SYS_TCU 45
#define QCS615_MASTER_UFS_MEM 46
#define QCS615_MASTER_USB2 47
#define QCS615_MASTER_USB3_0 48
#define QCS615_MASTER_VIDEO_P0 49
#define QCS615_MASTER_VIDEO_PROC 50
#define QCS615_SLAVE_A1NOC_CFG 51
#define QCS615_SLAVE_A1NOC_SNOC 52
#define QCS615_SLAVE_AHB2PHY_EAST 53
#define QCS615_SLAVE_AHB2PHY_WEST 54
#define QCS615_SLAVE_ANOC_PCIE_SNOC 55
#define QCS615_SLAVE_AOP 56
#define QCS615_SLAVE_AOSS 57
#define QCS615_SLAVE_APPSS 58
#define QCS615_SLAVE_CAMERA_CFG 59
#define QCS615_SLAVE_CAMNOC_UNCOMP 60
#define QCS615_SLAVE_CLK_CTL 61
#define QCS615_SLAVE_CNOC_A2NOC 62
#define QCS615_SLAVE_CNOC_DDRSS 63
#define QCS615_SLAVE_CNOC_MNOC_CFG 64
#define QCS615_SLAVE_CRYPTO_0_CFG 65
#define QCS615_SLAVE_DC_NOC_GEMNOC 66
#define QCS615_SLAVE_DISPLAY_CFG 67
#define QCS615_SLAVE_EBI1 68
#define QCS615_SLAVE_EMAC_AVB_CFG 69
#define QCS615_SLAVE_GEM_NOC_SNOC 70
#define QCS615_SLAVE_GFX3D_CFG 71
#define QCS615_SLAVE_GLM 72
#define QCS615_SLAVE_IMEM 73
#define QCS615_SLAVE_IMEM_CFG 74
#define QCS615_SLAVE_IPA_CFG 75
#define QCS615_SLAVE_IPA_CORE 76
#define QCS615_SLAVE_LLCC 77
#define QCS615_SLAVE_LLCC_CFG 78
#define QCS615_SLAVE_LPASS_SNOC 79
#define QCS615_SLAVE_MEM_NOC_PCIE_SNOC 80
#define QCS615_SLAVE_MNOC_HF_MEM_NOC 81
#define QCS615_SLAVE_MNOC_SF_MEM_NOC 82
#define QCS615_SLAVE_MSS_PROC_MS_MPU_CFG 83
#define QCS615_SLAVE_PCIE_0 84
#define QCS615_SLAVE_PCIE_CFG 85
#define QCS615_SLAVE_PIMEM 86
#define QCS615_SLAVE_PIMEM_CFG 87
#define QCS615_SLAVE_PRNG 88
#define QCS615_SLAVE_QDSS_CFG 89
#define QCS615_SLAVE_QDSS_STM 90
#define QCS615_SLAVE_QSPI 91
#define QCS615_SLAVE_QUP_0 92
#define QCS615_SLAVE_QUP_1 93
#define QCS615_SLAVE_RBCPR_CX_CFG 94
#define QCS615_SLAVE_RBCPR_MX_CFG 95
#define QCS615_SLAVE_SDCC_1 96
#define QCS615_SLAVE_SDCC_2 97
#define QCS615_SLAVE_SERVICE_A2NOC 98
#define QCS615_SLAVE_SERVICE_CNOC 99
#define QCS615_SLAVE_SERVICE_GEM_NOC 100
#define QCS615_SLAVE_SERVICE_MNOC 101
#define QCS615_SLAVE_SERVICE_SNOC 102
#define QCS615_SLAVE_SNOC_CFG 103
#define QCS615_SLAVE_SNOC_CNOC 104
#define QCS615_SLAVE_SNOC_GEM_NOC_SF 105
#define QCS615_SLAVE_SNOC_MEM_NOC_GC 106
#define QCS615_SLAVE_SPDM_WRAPPER 107
#define QCS615_SLAVE_TCSR 108
#define QCS615_SLAVE_TCU 109
#define QCS615_SLAVE_TLMM_EAST 110
#define QCS615_SLAVE_TLMM_SOUTH 111
#define QCS615_SLAVE_TLMM_WEST 112
#define QCS615_SLAVE_UFS_MEM_CFG 113
#define QCS615_SLAVE_USB2 114
#define QCS615_SLAVE_USB3 115
#define QCS615_SLAVE_VENUS_CFG 116
#define QCS615_SLAVE_VSENSE_CTRL_CFG 117
#endif