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ARM: tegra: Add missing HOST1X device nodes on Tegra124

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Add nodes for devices on the HOST1X bus: VI, ISP, ISPB, MSENC and TSEC.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Svyatoslav Ryhel
2025-10-16 10:41:51 +03:00
committed by Thierry Reding
parent cead96a67e
commit ad5eb81cbd
1 changed files with 64 additions and 0 deletions
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64
arch/arm/boot/dts/nvidia/tegra124.dtsi
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@@ -103,6 +103,45 @@
ranges = <0 0x54000000 0 0x54000000 0 0x01000000>;
vi@54080000 {
compatible = "nvidia,tegra124-vi";
reg = <0x0 0x54080000 0x0 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_VI>;
resets = <&tegra_car 20>;
reset-names = "vi";
iommus = <&mc TEGRA_SWGROUP_VI>;
status = "disabled";
};
isp@54600000 {
compatible = "nvidia,tegra124-isp";
reg = <0x0 0x54600000 0x0 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_ISP>;
resets = <&tegra_car TEGRA124_CLK_ISP>;
reset-names = "isp";
iommus = <&mc TEGRA_SWGROUP_ISP2>;
status = "disabled";
};
isp@54680000 {
compatible = "nvidia,tegra124-isp";
reg = <0x0 0x54680000 0x0 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_ISPB>;
resets = <&tegra_car TEGRA124_CLK_ISPB>;
reset-names = "isp";
iommus = <&mc TEGRA_SWGROUP_ISP2B>;
status = "disabled";
};
dc@54200000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
@@ -209,6 +248,31 @@
#size-cells = <0>;
};
msenc@544c0000 {
compatible = "nvidia,tegra124-msenc";
reg = <0x0 0x544c0000 0x0 0x00040000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_MSENC>;
resets = <&tegra_car TEGRA124_CLK_MSENC>;
reset-names = "mpe";
iommus = <&mc TEGRA_SWGROUP_MSENC>;
status = "disabled";
};
tsec@54500000 {
compatible = "nvidia,tegra124-tsec";
reg = <0x0 0x54500000 0x0 0x00040000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSEC>;
resets = <&tegra_car TEGRA124_CLK_TSEC>;
iommus = <&mc TEGRA_SWGROUP_TSEC>;
status = "disabled";
};
sor@54540000 {
compatible = "nvidia,tegra124-sor";
reg = <0x0 0x54540000 0x0 0x00040000>;