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drm/i915/display: No need for full modeset due to psr

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There is no specific reason to force full modeset if psr is enabled.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Tested-by: Paz Zcharya <pazz@chromium.org>
Reviewed-by: Stanislav Lisovskiy <staniskav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240109100517.1947414-2-jouni.hogander@intel.com
This commit is contained in:
Jouni Högander
2024-01-09 12:05:16 +02:00
parent f3c2031db7
commit a480dd59fe
2 changed files with 0 additions and 14 deletions
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7
drivers/gpu/drm/i915/display/intel_display.c
View File

@@ -5212,13 +5212,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_CSC(csc);
PIPE_CONF_CHECK_CSC(output_csc);
if (current_config->active_planes) {
PIPE_CONF_CHECK_BOOL(has_psr);
PIPE_CONF_CHECK_BOOL(has_psr2);
PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
PIPE_CONF_CHECK_I(dc3co_exitline);
}
}
PIPE_CONF_CHECK_BOOL(double_wide);

7
drivers/gpu/drm/i915/display/intel_dp.c
View File

@@ -3326,13 +3326,6 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
fastset = false;
}
if (CAN_PSR(intel_dp)) {
drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset to compute PSR state\n",
encoder->base.base.id, encoder->base.name);
crtc_state->uapi.mode_changed = true;
fastset = false;
}
return fastset;
}