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Merge tag 'zynq-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx into arm/dt

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ARM: dts: zynq: DT changes for v5.11

- Adding support for Zturn-v5
- Small DT changes to clean errors from dt_binding_check

* tag 'zynq-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Fix incorrect reference to XM013 instead of XM011
  ARM: zynq: Convert at25 binding to new description on zc770-xm013
  ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
  ARM: zynq: Fix leds subnode name for zc702/zybo-z7
  ARM: zynq: Rename bus to be align with simple-bus yaml
  ARM: zynq: Fix compatible string for adi,adxl345 chip
  ARM: zynq: Add Z-turn board V5
This commit is contained in:
Arnd Bergmann
2020-12-09 18:00:06 +01:00
parent c87b013f23 a508f620b5
commit a05c51e04d
9 changed files with 142 additions and 108 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
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@@ -1317,6 +1317,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
zynq-zturn.dtb \
zynq-zturn-v5.dtb \
zynq-zybo.dtb \
zynq-zybo-z7.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \

2
arch/arm/boot/dts/zynq-7000.dtsi
View File

@@ -92,7 +92,7 @@
};
};
amba: amba {
amba: axi {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

8
arch/arm/boot/dts/zynq-zc702.dts
View File

@@ -49,7 +49,7 @@
leds {
compatible = "gpio-leds";
ds23 {
led-ds23 {
label = "ds23";
gpios = <&gpio0 10 0>;
linux,default-trigger = "heartbeat";
@@ -66,6 +66,12 @@
ocm: sram@fffc0000 {
compatible = "mmio-sram";
reg = <0xfffc0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xfffc0000 0x10000>;
ocm-sram@0 {
reg = <0x0 0x10000>;
};
};
};

2
arch/arm/boot/dts/zynq-zc770-xm011.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC770 XM013 board DTS
* Xilinx ZC770 XM011 board DTS
*
* Copyright (C) 2013-2018 Xilinx, Inc.
*/

7
arch/arm/boot/dts/zynq-zc770-xm013.dts
View File

@@ -63,13 +63,12 @@
num-cs = <4>;
is-decoded-cs = <0>;
eeprom: eeprom@2 {
at25,byte-len = <8192>;
at25,addr-mode = <2>;
at25,page-size = <32>;
compatible = "atmel,at25";
reg = <2>;
spi-max-frequency = <1000000>;
size = <8192>;
address-width = <16>;
pagesize = <32>;
};
};

112
arch/arm/boot/dts/zynq-zturn-common.dtsi Normal file
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@@ -0,0 +1,112 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
* Copyright (C) 2017 Alexander Graf <agraf@suse.de>
*
* Based on zynq-zed.dts which is:
* Copyright (C) 2011 - 2014 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/ {
compatible = "xlnx,zynq-7000";
aliases {
ethernet0 = &gem0;
serial0 = &uart1;
serial1 = &uart0;
mmc0 = &sdhci0;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-leds {
compatible = "gpio-leds";
usr-led1 {
label = "usr-led1";
gpios = <&gpio0 0x0 0x1>;
default-state = "off";
};
usr-led2 {
label = "usr-led2";
gpios = <&gpio0 0x9 0x1>;
default-state = "off";
};
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
K1 {
label = "K1";
gpios = <&gpio0 0x32 0x1>;
linux,code = <0x66>;
wakeup-source;
autorepeat;
};
};
};
&clkc {
ps-clk-frequency = <33333333>;
};
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;
ethernet_phy: ethernet-phy@0 {
};
};
&sdhci0 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&can0 {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
stlm75@49 {
status = "okay";
compatible = "lm75";
reg = <0x49>;
};
accelerometer@53 {
compatible = "adi,adxl345";
reg = <0x53>;
interrupt-parent = <&intc>;
interrupts = <0x0 0x1e 0x4>;
};
};

15
arch/arm/boot/dts/zynq-zturn-v5.dts Normal file
View File

@@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "zynq-zturn-common.dtsi"
/ {
model = "Zynq Z-Turn MYIR Board V5";
compatible = "myir,zynq-zturn-v5", "xlnx,zynq-7000";
};
&gem0 {
ethernet_phy: ethernet-phy@0 {
reg = <0x3>;
};
};

101
arch/arm/boot/dts/zynq-zturn.dts
View File

@@ -1,114 +1,15 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
* Copyright (C) 2017 Alexander Graf <agraf@suse.de>
*
* Based on zynq-zed.dts which is:
* Copyright (C) 2011 - 2014 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/include/ "zynq-zturn-common.dtsi"
/ {
model = "Zynq Z-Turn MYIR Board";
compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
aliases {
ethernet0 = &gem0;
serial0 = &uart1;
serial1 = &uart0;
mmc0 = &sdhci0;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-leds {
compatible = "gpio-leds";
usr-led1 {
label = "usr-led1";
gpios = <&gpio0 0x0 0x1>;
default-state = "off";
};
usr-led2 {
label = "usr-led2";
gpios = <&gpio0 0x9 0x1>;
default-state = "off";
};
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
K1 {
label = "K1";
gpios = <&gpio0 0x32 0x1>;
linux,code = <0x66>;
wakeup-source;
autorepeat;
};
};
};
&clkc {
ps-clk-frequency = <33333333>;
};
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;
ethernet_phy: ethernet-phy@0 {
reg = <0x0>;
};
};
&sdhci0 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&can0 {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
stlm75@49 {
status = "okay";
compatible = "lm75";
reg = <0x49>;
};
accelerometer@53 {
compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
reg = <0x53>;
interrupt-parent = <&intc>;
interrupts = <0x0 0x1e 0x4>;
};
};

2
arch/arm/boot/dts/zynq-zybo-z7.dts
View File

@@ -25,7 +25,7 @@
gpio-leds {
compatible = "gpio-leds";
ld4 {
led-ld4 {
label = "zynq-zybo-z7:green:ld4";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};