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scsi: ufs: host: mediatek: Support new features for MT6991

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Add support for the MT6991 platform by enabling MRTT settings and random
performance improvements. These enhancements aim to optimize performance
and efficiency on the MT6991 hardware.

Enable multi-Round Trip Time (MRTT) for improved data handling.  Enable
random performance improvement features to boost overall system
responsiveness.

Signed-off-by: Naomi Chu <naomi.chu@mediatek.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Acked-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://patch.msgid.link/20250924094527.2992256-9-peter.wang@mediatek.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Naomi Chu
2025-09-24 17:43:30 +08:00
committed by Martin K. Petersen
parent 4fb4c835a9
commit 9ce37e94c3
2 changed files with 9 additions and 0 deletions
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6
drivers/ufs/host/ufs-mediatek.c
View File

@@ -289,6 +289,12 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
0x453000, REG_UFS_MMIO_OPT_CTRL_0);
}
if (host->ip_ver >= IP_VER_MT6991_A0) {
/* Enable multi-rtt */
ufshcd_rmwl(hba, MRTT_EN, MRTT_EN, REG_UFS_MMIO_OPT_CTRL_0);
/* Enable random performance improvement */
ufshcd_rmwl(hba, RDN_PFM_IMPV_DIS, 0, REG_UFS_MMIO_OPT_CTRL_0);
}
}
return 0;

3
drivers/ufs/host/ufs-mediatek.h
View File

@@ -20,6 +20,9 @@
#define MCQ_MULTI_INTR_EN BIT(2)
#define MCQ_CMB_INTR_EN BIT(3)
#define MCQ_AH8 BIT(4)
#define MON_EN BIT(5)
#define MRTT_EN BIT(25)
#define RDN_PFM_IMPV_DIS BIT(28)
#define MCQ_INTR_EN_MSK (MCQ_MULTI_INTR_EN | MCQ_CMB_INTR_EN)