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arm64: dts: socfpga: agilex5: add support for 013b board
Agilex5 SoCFPGA 013b is a small form factor development kit. Supports both tabletop and PCIe add-in card operation. It features expansion headers for Raspberry Pi 4/5 HATs and Digilent Pmod modules, enabling integration with popular ecosystems. Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Dinh Nguyen
parent
58676e819b
commit
95853aaab9
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
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socfpga_agilex_socdk.dtb \
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socfpga_agilex_socdk_nand.dtb \
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socfpga_agilex5_socdk.dtb \
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socfpga_agilex5_socdk_013b.dtb \
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socfpga_agilex5_socdk_nand.dtb \
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socfpga_n5x_socdk.dtb
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dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
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126
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts
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126
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts
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@@ -0,0 +1,126 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2025, Altera Corporation
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*/
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#include "socfpga_agilex5.dtsi"
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/ {
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model = "SoCFPGA Agilex5 013B SoCDK";
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compatible = "intel,socfpga-agilex5-socdk-013b", "intel,socfpga-agilex5";
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aliases {
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serial0 = &uart0;
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ethernet2 = &gmac2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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label = "hps_led0";
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gpios = <&porta 1 GPIO_ACTIVE_HIGH>;
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};
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led1 {
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label = "hps_led1";
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gpios = <&porta 12 GPIO_ACTIVE_HIGH>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0x0 0x80000000 0x0 0x0>;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <&emac2_phy0>;
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max-frame-size = <9000>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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emac2_phy0: ethernet-phy@0 {
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reg = <0>;
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rxc-skew-ps = <0>;
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rxdv-skew-ps = <0>;
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txc-skew-ps = <0>;
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txen-skew-ps = <60>;
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txd0-skew-ps = <60>;
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txd1-skew-ps = <60>;
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txd2-skew-ps = <60>;
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txd3-skew-ps = <60>;
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&osc1 {
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clock-frequency = <25000000>;
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};
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&qspi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,read-delay = <2>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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qspi_boot: partition@0 {
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label = "u-boot";
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reg = <0x0 0x00600000>;
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};
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root: partition@4200000 {
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label = "root";
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reg = <0x00600000 0x03a00000>;
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};
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};
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};
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};
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&smmu {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&watchdog0 {
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status = "okay";
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};
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