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drm/i915/cx0: Move the HDMI FRL function to intel_hdmi
Move the is_hdmi_frl to intel_hdmi.c. Rename it appropriately and make it non static. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patch.msgid.link/20251101032513.4171255-5-suraj.kandpal@intel.com
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@@ -2590,20 +2590,6 @@ static bool is_dp2(u32 clock)
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return false;
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}
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static bool is_hdmi_frl(u32 clock)
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{
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switch (clock) {
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case 300000: /* 3 Gbps */
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case 600000: /* 6 Gbps */
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case 800000: /* 8 Gbps */
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case 1000000: /* 10 Gbps */
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case 1200000: /* 12 Gbps */
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return true;
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default:
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return false;
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}
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}
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static bool intel_c20_protocol_switch_valid(struct intel_encoder *encoder)
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{
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struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
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@@ -2617,7 +2603,7 @@ static int intel_get_c20_custom_width(u32 clock, bool dp)
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{
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if (dp && is_dp2(clock))
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return 2;
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else if (is_hdmi_frl(clock))
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else if (intel_hdmi_is_frl(clock))
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return 1;
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else
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return 0;
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@@ -2706,11 +2692,10 @@ static void intel_c20_pll_program(struct intel_display *display,
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/* 5. For DP or 6. For HDMI */
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serdes = 0;
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if (is_dp)
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serdes = PHY_C20_IS_DP |
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PHY_C20_DP_RATE(intel_c20_get_dp_rate(port_clock));
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else if (is_hdmi_frl(port_clock))
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else if (intel_hdmi_is_frl(port_clock))
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serdes = PHY_C20_IS_HDMI_FRL;
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intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,
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@@ -2777,7 +2762,7 @@ static void intel_program_port_clock_ctl(struct intel_encoder *encoder,
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val |= XELPDP_FORWARD_CLOCK_UNGATE;
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if (!is_dp && is_hdmi_frl(port_clock))
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if (!is_dp && intel_hdmi_is_frl(port_clock))
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val |= XELPDP_DDI_CLOCK_SELECT_PREP(display, XELPDP_DDI_CLOCK_SELECT_DIV18CLK);
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else
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val |= XELPDP_DDI_CLOCK_SELECT_PREP(display, XELPDP_DDI_CLOCK_SELECT_MAXPCLK);
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@@ -68,6 +68,20 @@
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#include "intel_snps_phy.h"
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#include "intel_vrr.h"
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bool intel_hdmi_is_frl(u32 clock)
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{
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switch (clock) {
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case 300000: /* 3 Gbps */
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case 600000: /* 6 Gbps */
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case 800000: /* 8 Gbps */
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case 1000000: /* 10 Gbps */
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case 1200000: /* 12 Gbps */
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return true;
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default:
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return false;
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}
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}
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static void
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assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi)
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{
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@@ -60,6 +60,7 @@ int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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int src_max_slices, int src_max_slice_width,
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int hdmi_max_slices, int hdmi_throughput);
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int intel_hdmi_dsc_get_slice_height(int vactive);
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bool intel_hdmi_is_frl(u32 clock);
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void hsw_write_infoframe(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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