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drm/amd/display: Fix wrong index for DCN401 cursor offload

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[Why]
Payloads are ignored because the wrong index is written as part of the
pipe update implementation for DCN401.

[How]
Align it to the DCN35 implementation and ensure the + 1 is added.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas
2025-10-07 10:40:26 -04:00
committed by Alex Deucher
parent 610cf76e94
commit 7c228b1aab
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
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@@ -2978,7 +2978,7 @@ void dcn401_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pip
return;
stream_idx = top_pipe->pipe_idx;
write_idx = cs->offload_streams[stream_idx].write_idx;
write_idx = cs->offload_streams[stream_idx].write_idx + 1; /* new payload (+1) */
payload_idx = write_idx % ARRAY_SIZE(cs->offload_streams[stream_idx].payloads);
p = &cs->offload_streams[stream_idx].payloads[payload_idx].pipe_data[pipe->pipe_idx].dcn401;