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MAINTAINERS: add tree to RISC-V Microchip entry
In fairness to my own employer, lumping it in as "misc" is not quite accurate when they do pay me to look after the platform. Move the tree link for it to its entry, rather than having the RISC-V MISC SOC SUPPORT entry cover it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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@@ -22084,6 +22084,7 @@ M: Conor Dooley <conor.dooley@microchip.com>
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M: Daire McNamara <daire.mcnamara@microchip.com>
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L: linux-riscv@lists.infradead.org
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S: Supported
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T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ (dts, soc, firmware)
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F: Documentation/devicetree/bindings/clock/microchip,mpfs*.yaml
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F: Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
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F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml
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@@ -22117,7 +22118,6 @@ L: linux-riscv@lists.infradead.org
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S: Maintained
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T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
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F: arch/riscv/boot/dts/canaan/
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F: arch/riscv/boot/dts/microchip/
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F: arch/riscv/boot/dts/sifive/
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RISC-V PMU DRIVERS
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