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arm64: dts: mt8195: Change idle states names to reflect actual function

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The names of the idle states are misleading being this a single cluster
SoC, a cluster-off idle state is impossible!

After some research in ATF, it emerged that the cpu-off state is in
reality putting CPUs in retention state, while the cluster-off one
is turning off the CPUs.

Summarizing renaming:
 - cpu-off -> cpu-retention
 - cluster-off -> cpu-off

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230126103526.417039-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
AngeloGioacchino Del Regno
2023-01-26 11:35:24 +01:00
committed by Matthias Brugger
parent 1c473804b0
commit 66fe2431fa
1 changed files with 12 additions and 12 deletions
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24
arch/arm64/boot/dts/mediatek/mt8195.dtsi
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@@ -38,7 +38,7 @@
performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <308>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>;
i-cache-line-size = <64>;
i-cache-sets = <128>;
@@ -57,7 +57,7 @@
performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <308>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>;
i-cache-line-size = <64>;
i-cache-sets = <128>;
@@ -76,7 +76,7 @@
performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <308>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>;
i-cache-line-size = <64>;
i-cache-sets = <128>;
@@ -95,7 +95,7 @@
performance-domains = <&performance 0>;
clock-frequency = <1701000000>;
capacity-dmips-mhz = <308>;
cpu-idle-states = <&cpu_off_l &cluster_off_l>;
cpu-idle-states = <&cpu_ret_l &cpu_off_l>;
i-cache-size = <32768>;
i-cache-line-size = <64>;
i-cache-sets = <128>;
@@ -114,7 +114,7 @@
performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -133,7 +133,7 @@
performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -152,7 +152,7 @@
performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -171,7 +171,7 @@
performance-domains = <&performance 1>;
clock-frequency = <2171000000>;
capacity-dmips-mhz = <1024>;
cpu-idle-states = <&cpu_off_b &cluster_off_b>;
cpu-idle-states = <&cpu_ret_b &cpu_off_b>;
i-cache-size = <65536>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@@ -221,7 +221,7 @@
idle-states {
entry-method = "psci";
cpu_off_l: cpu-off-l {
cpu_ret_l: cpu-retention-l {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x00010001>;
local-timer-stop;
@@ -230,7 +230,7 @@
min-residency-us = <580>;
};
cpu_off_b: cpu-off-b {
cpu_ret_b: cpu-retention-b {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x00010001>;
local-timer-stop;
@@ -239,7 +239,7 @@
min-residency-us = <740>;
};
cluster_off_l: cluster-off-l {
cpu_off_l: cpu-off-l {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x01010002>;
local-timer-stop;
@@ -248,7 +248,7 @@
min-residency-us = <840>;
};
cluster_off_b: cluster-off-b {
cpu_off_b: cpu-off-b {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x01010002>;
local-timer-stop;