mirror of
https://github.com/torvalds/linux.git
synced 2025-12-07 20:06:24 +00:00
ALSA: oxygen: Use guard() for spin locks
Clean up the code using guard() for spin locks. Merely code refactoring, and no behavior change. Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20250829144342.4290-48-tiwai@suse.de
This commit is contained in:
@@ -59,36 +59,34 @@ static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
|
||||
if (!status)
|
||||
return IRQ_NONE;
|
||||
|
||||
spin_lock(&chip->reg_lock);
|
||||
scoped_guard(spinlock, &chip->reg_lock) {
|
||||
clear = status & (OXYGEN_CHANNEL_A |
|
||||
OXYGEN_CHANNEL_B |
|
||||
OXYGEN_CHANNEL_C |
|
||||
OXYGEN_CHANNEL_SPDIF |
|
||||
OXYGEN_CHANNEL_MULTICH |
|
||||
OXYGEN_CHANNEL_AC97 |
|
||||
OXYGEN_INT_SPDIF_IN_DETECT |
|
||||
OXYGEN_INT_GPIO |
|
||||
OXYGEN_INT_AC97);
|
||||
if (clear) {
|
||||
if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
|
||||
chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask & ~clear);
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask);
|
||||
}
|
||||
|
||||
clear = status & (OXYGEN_CHANNEL_A |
|
||||
OXYGEN_CHANNEL_B |
|
||||
OXYGEN_CHANNEL_C |
|
||||
OXYGEN_CHANNEL_SPDIF |
|
||||
OXYGEN_CHANNEL_MULTICH |
|
||||
OXYGEN_CHANNEL_AC97 |
|
||||
OXYGEN_INT_SPDIF_IN_DETECT |
|
||||
OXYGEN_INT_GPIO |
|
||||
OXYGEN_INT_AC97);
|
||||
if (clear) {
|
||||
if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
|
||||
chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask & ~clear);
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask);
|
||||
elapsed_streams = status & chip->pcm_running;
|
||||
}
|
||||
|
||||
elapsed_streams = status & chip->pcm_running;
|
||||
|
||||
spin_unlock(&chip->reg_lock);
|
||||
|
||||
for (i = 0; i < PCM_COUNT; ++i)
|
||||
if ((elapsed_streams & (1 << i)) && chip->streams[i])
|
||||
snd_pcm_period_elapsed(chip->streams[i]);
|
||||
|
||||
if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
|
||||
spin_lock(&chip->reg_lock);
|
||||
guard(spinlock)(&chip->reg_lock);
|
||||
i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
|
||||
if (i & (OXYGEN_SPDIF_SENSE_INT | OXYGEN_SPDIF_LOCK_INT |
|
||||
OXYGEN_SPDIF_RATE_INT)) {
|
||||
@@ -96,7 +94,6 @@ static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
|
||||
schedule_work(&chip->spdif_input_bits_work);
|
||||
}
|
||||
spin_unlock(&chip->reg_lock);
|
||||
}
|
||||
|
||||
if (status & OXYGEN_INT_GPIO)
|
||||
@@ -127,45 +124,45 @@ static void oxygen_spdif_input_bits_changed(struct work_struct *work)
|
||||
* changes.
|
||||
*/
|
||||
msleep(1);
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
|
||||
if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
|
||||
OXYGEN_SPDIF_LOCK_STATUS))
|
||||
== OXYGEN_SPDIF_SENSE_STATUS) {
|
||||
/*
|
||||
* If we detect activity on the SPDIF input but cannot lock to
|
||||
* a signal, the clock bit is likely to be wrong.
|
||||
*/
|
||||
reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
msleep(1);
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
|
||||
if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
|
||||
OXYGEN_SPDIF_LOCK_STATUS))
|
||||
== OXYGEN_SPDIF_SENSE_STATUS) {
|
||||
/* nothing detected with either clock; give up */
|
||||
if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
|
||||
== OXYGEN_SPDIF_IN_CLOCK_192) {
|
||||
/*
|
||||
* Reset clock to <= 96 kHz because this is
|
||||
* more likely to be received next time.
|
||||
*/
|
||||
reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
|
||||
reg |= OXYGEN_SPDIF_IN_CLOCK_96;
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
|
||||
/*
|
||||
* If we detect activity on the SPDIF input but cannot lock to
|
||||
* a signal, the clock bit is likely to be wrong.
|
||||
*/
|
||||
reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
msleep(1);
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
|
||||
if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
|
||||
OXYGEN_SPDIF_LOCK_STATUS))
|
||||
== OXYGEN_SPDIF_SENSE_STATUS) {
|
||||
/* nothing detected with either clock; give up */
|
||||
if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
|
||||
== OXYGEN_SPDIF_IN_CLOCK_192) {
|
||||
/*
|
||||
* Reset clock to <= 96 kHz because this is
|
||||
* more likely to be received next time.
|
||||
*/
|
||||
reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
|
||||
reg |= OXYGEN_SPDIF_IN_CLOCK_96;
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
|
||||
if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
|
||||
chip->interrupt_mask);
|
||||
}
|
||||
|
||||
/*
|
||||
* We don't actually know that any channel status bits have
|
||||
@@ -557,12 +554,11 @@ static void oxygen_init(struct oxygen *chip)
|
||||
|
||||
static void oxygen_shutdown(struct oxygen *chip)
|
||||
{
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
chip->interrupt_mask = 0;
|
||||
chip->pcm_running = 0;
|
||||
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
}
|
||||
|
||||
static void oxygen_card_free(struct snd_card *card)
|
||||
@@ -686,13 +682,13 @@ static int __oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
|
||||
|
||||
oxygen_proc_init(chip);
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
|
||||
chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
if (chip->has_ac97_0 | chip->has_ac97_1)
|
||||
chip->interrupt_mask |= OXYGEN_INT_AC97;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
|
||||
chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
|
||||
if (chip->has_ac97_0 | chip->has_ac97_1)
|
||||
chip->interrupt_mask |= OXYGEN_INT_AC97;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
||||
}
|
||||
|
||||
err = snd_card_register(card);
|
||||
if (err < 0)
|
||||
@@ -724,12 +720,12 @@ static int oxygen_pci_suspend(struct device *dev)
|
||||
if (chip->model.suspend)
|
||||
chip->model.suspend(chip);
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
saved_interrupt_mask = chip->interrupt_mask;
|
||||
chip->interrupt_mask = 0;
|
||||
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
saved_interrupt_mask = chip->interrupt_mask;
|
||||
chip->interrupt_mask = 0;
|
||||
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
||||
}
|
||||
|
||||
flush_work(&chip->spdif_input_bits_work);
|
||||
flush_work(&chip->gpio_work);
|
||||
|
||||
@@ -432,7 +432,7 @@ static int spdif_bit_switch_put(struct snd_kcontrol *ctl,
|
||||
u32 oldreg, newreg;
|
||||
int changed;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oldreg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
|
||||
if (value->value.integer.value[0])
|
||||
newreg = oldreg | bit;
|
||||
@@ -441,7 +441,6 @@ static int spdif_bit_switch_put(struct snd_kcontrol *ctl,
|
||||
changed = newreg != oldreg;
|
||||
if (changed)
|
||||
oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, newreg);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
return changed;
|
||||
}
|
||||
|
||||
@@ -476,7 +475,7 @@ static int monitor_put(struct snd_kcontrol *ctl,
|
||||
u8 oldreg, newreg;
|
||||
int changed;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oldreg = oxygen_read8(chip, OXYGEN_ADC_MONITOR);
|
||||
if ((!!value->value.integer.value[0] ^ !!invert) != 0)
|
||||
newreg = oldreg | bit;
|
||||
@@ -485,7 +484,6 @@ static int monitor_put(struct snd_kcontrol *ctl,
|
||||
changed = newreg != oldreg;
|
||||
if (changed)
|
||||
oxygen_write8(chip, OXYGEN_ADC_MONITOR, newreg);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
return changed;
|
||||
}
|
||||
|
||||
|
||||
@@ -349,20 +349,20 @@ static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
|
||||
OXYGEN_REC_FORMAT_A_MASK);
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_A, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
|
||||
OXYGEN_REC_FORMAT_A_MASK);
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_A, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
}
|
||||
|
||||
guard(mutex)(&chip->mutex);
|
||||
chip->model.set_adc_params(chip, hw_params);
|
||||
@@ -383,21 +383,21 @@ static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
|
||||
is_ac97 = chip->has_ac97_1 &&
|
||||
(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
|
||||
OXYGEN_REC_FORMAT_B_MASK);
|
||||
if (!is_ac97)
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_B, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
|
||||
OXYGEN_REC_FORMAT_B_MASK);
|
||||
if (!is_ac97)
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_B, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
}
|
||||
|
||||
if (!is_ac97) {
|
||||
guard(mutex)(&chip->mutex);
|
||||
@@ -419,21 +419,21 @@ static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
|
||||
|
||||
is_spdif = chip->model.device_config & CAPTURE_1_FROM_SPDIF;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
|
||||
OXYGEN_REC_FORMAT_C_MASK);
|
||||
if (!is_spdif)
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_B, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
|
||||
OXYGEN_REC_FORMAT_C_MASK);
|
||||
if (!is_spdif)
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.adc_i2s_format |
|
||||
get_mclk(chip, PCM_B, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
}
|
||||
|
||||
if (!is_spdif) {
|
||||
guard(mutex)(&chip->mutex);
|
||||
@@ -453,7 +453,7 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
|
||||
return err;
|
||||
|
||||
guard(mutex)(&chip->mutex);
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
|
||||
OXYGEN_SPDIF_OUT_ENABLE);
|
||||
oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
|
||||
@@ -463,7 +463,6 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
|
||||
oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
|
||||
OXYGEN_SPDIF_OUT_RATE_MASK);
|
||||
oxygen_update_spdif_source(chip);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -478,24 +477,24 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
|
||||
return err;
|
||||
|
||||
guard(mutex)(&chip->mutex);
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
|
||||
oxygen_play_channels(hw_params),
|
||||
OXYGEN_PLAY_CHANNELS_MASK);
|
||||
oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
|
||||
OXYGEN_MULTICH_FORMAT_MASK);
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.dac_i2s_format |
|
||||
get_mclk(chip, PCM_MULTICH, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
oxygen_update_spdif_source(chip);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
|
||||
oxygen_play_channels(hw_params),
|
||||
OXYGEN_PLAY_CHANNELS_MASK);
|
||||
oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
|
||||
oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
|
||||
OXYGEN_MULTICH_FORMAT_MASK);
|
||||
oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
|
||||
oxygen_rate(hw_params) |
|
||||
chip->model.dac_i2s_format |
|
||||
get_mclk(chip, PCM_MULTICH, hw_params) |
|
||||
oxygen_i2s_bits(hw_params),
|
||||
OXYGEN_I2S_RATE_MASK |
|
||||
OXYGEN_I2S_FORMAT_MASK |
|
||||
OXYGEN_I2S_MCLK_MASK |
|
||||
OXYGEN_I2S_BITS_MASK);
|
||||
oxygen_update_spdif_source(chip);
|
||||
}
|
||||
|
||||
chip->model.set_dac_params(chip, hw_params);
|
||||
oxygen_update_dac_routing(chip);
|
||||
@@ -508,13 +507,12 @@ static int oxygen_hw_free(struct snd_pcm_substream *substream)
|
||||
unsigned int channel = oxygen_substream_channel(substream);
|
||||
unsigned int channel_mask = 1 << channel;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
chip->interrupt_mask &= ~channel_mask;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
||||
|
||||
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
|
||||
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -523,10 +521,10 @@ static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct oxygen *chip = snd_pcm_substream_chip(substream);
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
|
||||
OXYGEN_SPDIF_OUT_ENABLE);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
scoped_guard(spinlock_irq, &chip->reg_lock) {
|
||||
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
|
||||
OXYGEN_SPDIF_OUT_ENABLE);
|
||||
}
|
||||
return oxygen_hw_free(substream);
|
||||
}
|
||||
|
||||
@@ -536,7 +534,7 @@ static int oxygen_prepare(struct snd_pcm_substream *substream)
|
||||
unsigned int channel = oxygen_substream_channel(substream);
|
||||
unsigned int channel_mask = 1 << channel;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
|
||||
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
|
||||
|
||||
@@ -545,7 +543,6 @@ static int oxygen_prepare(struct snd_pcm_substream *substream)
|
||||
else
|
||||
chip->interrupt_mask |= channel_mask;
|
||||
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -577,7 +574,7 @@ static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
|
||||
}
|
||||
}
|
||||
|
||||
spin_lock(&chip->reg_lock);
|
||||
guard(spinlock)(&chip->reg_lock);
|
||||
if (!pausing) {
|
||||
if (cmd == SNDRV_PCM_TRIGGER_START)
|
||||
chip->pcm_running |= mask;
|
||||
@@ -590,7 +587,6 @@ static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
|
||||
else
|
||||
oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
|
||||
}
|
||||
spin_unlock(&chip->reg_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -339,11 +339,10 @@ static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
|
||||
unsigned int reg, unsigned int mute)
|
||||
{
|
||||
if (reg == AC97_LINE) {
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
|
||||
mute ? GPIO_D1_INPUT_ROUTE : 0,
|
||||
GPIO_D1_INPUT_ROUTE);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -109,7 +109,7 @@ int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
|
||||
u16 old_bits, new_bits;
|
||||
int changed;
|
||||
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
|
||||
if (!!value->value.integer.value[0] ^ invert)
|
||||
new_bits = old_bits | bit;
|
||||
@@ -118,6 +118,5 @@ int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
|
||||
changed = new_bits != old_bits;
|
||||
if (changed)
|
||||
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
return changed;
|
||||
}
|
||||
|
||||
@@ -1021,11 +1021,10 @@ static void xonar_line_mic_ac97_switch(struct oxygen *chip,
|
||||
unsigned int reg, unsigned int mute)
|
||||
{
|
||||
if (reg == AC97_LINE) {
|
||||
spin_lock_irq(&chip->reg_lock);
|
||||
guard(spinlock_irq)(&chip->reg_lock);
|
||||
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
|
||||
mute ? GPIO_INPUT_ROUTE : 0,
|
||||
GPIO_INPUT_ROUTE);
|
||||
spin_unlock_irq(&chip->reg_lock);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user