admin/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2025-12-07 20:06:24 +00:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: ti: k3-j784s4: Add phase tags marking

Browse Source 
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linux to be aligned with bootloader requirement.

On TI K3 J784S4 SoC, only secure_proxy_mcu and secure_proxy_sa3 nodes are
exclusively used by R5 bootloader, rest of the dts nodes with bootph-* are
used by later boot stages also.

And secure_proxy_mcu and secure_proxy_sa3 are disabled in kernel device
tree, and will be only enabled in R5 bootloader device tree.
So, bootph-pre-ram for secure_proxy_mcu and secure_proxy_sa3 will be
added in R5 bootloader device tree only.

Add bootph-all for all other nodes that are used in the bootloader on
K3 J784S4 SoC, and bootph-pre-ram is not needed specifically for any node
in kernel dts.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230811192030.3480616-2-a-nandan@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Apurva Nandan
2023-08-12 00:50:28 +05:30
committed by Nishanth Menon
parent 1f7226a5e5
commit 3a40869856
3 changed files with 13 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
View File

@@ -670,6 +670,7 @@
};
main_navss: bus@30000000 {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -705,6 +706,7 @@
};
secure_proxy_main: mailbox@32c00000 {
bootph-all;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";

9
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
View File

@@ -7,6 +7,7 @@
&cbass_mcu_wakeup {
sms: system-controller@44083000 {
bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
@@ -19,22 +20,26 @@
reg = <0x00 0x44083000 0x00 0x1000>;
k3_pds: power-controller {
bootph-all;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
bootph-all;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
bootph-all;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
};
chipid@43000014 {
bootph-all;
compatible = "ti,am654-chipid";
reg = <0x00 0x43000014 0x00 0x4>;
};
@@ -161,6 +166,7 @@
};
mcu_timer1: timer@40410000 {
bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x40410000 0x00 0x400>;
interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
@@ -442,6 +448,7 @@
};
mcu_navss: bus@28380000 {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -451,6 +458,7 @@
dma-ranges;
mcu_ringacc: ringacc@2b800000 {
bootph-all;
compatible = "ti,am654-navss-ringacc";
reg = <0x00 0x2b800000 0x00 0x400000>,
<0x00 0x2b000000 0x00 0x400000>,
@@ -466,6 +474,7 @@
};
mcu_udmap: dma-controller@285c0000 {
bootph-all;
compatible = "ti,j721e-navss-mcu-udmap";
reg = <0x00 0x285c0000 0x00 0x100>,
<0x00 0x2a800000 0x00 0x40000>,

2
arch/arm64/boot/dts/ti/k3-j784s4.dtsi
View File

@@ -228,6 +228,7 @@
};
cbass_main: bus@100000 {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -263,6 +264,7 @@
<0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>;
cbass_mcu_wakeup: bus@28380000 {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;