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drm/amd/display: Modify checks to enable TPS3 pattern when required
[HOW&WHY] Checking if both DSC and FEC supported from sink and source before going with TPS3 pattern during link training. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
14e1f089d5
commit
361edc61a0
@@ -399,7 +399,11 @@ static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
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link->psr_settings.force_ffu_mode = 0;
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copy_settings_data->force_ffu_mode = link->psr_settings.force_ffu_mode;
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if (link->fec_state == dc_link_fec_enabled &&
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if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
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!link->dc->debug.disable_fec) &&
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(link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
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!link->panel_config.dsc.disable_dsc_edp &&
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link->dc->caps.edp_dsc_support)) &&
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link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
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(!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,
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sizeof(DP_SINK_DEVICE_STR_ID_1)) ||
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