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Merge branch 'net-stmmac-clean-up-plat_dat-allocation-initialisation'

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Russell King says:

====================
net: stmmac: clean up plat_dat allocation/initialisation

This series cleans up the plat_dat allocation and initialisation,
moving common themes into the allocator.

This results in a nice saving:
  7 files changed, 53 insertions(+), 148 deletions(-)
====================

Link: https://patch.msgid.link/aRdKVMPHXlIn457m@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-11-17 19:48:00 -08:00
parent 7cf3ac8a9c 6409249ccc
commit 2f2dee1696
7 changed files with 53 additions and 148 deletions
Download Patch File Download Diff File Expand all files Collapse all files

43
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
View File

@@ -569,26 +569,6 @@ static void common_default_data(struct plat_stmmacenet_data *plat)
plat->force_sf_dma_mode = 1;
plat->mdio_bus_data->needs_reset = true;
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/* Set the maxmtu to a default of JUMBO_LEN */
plat->maxmtu = JUMBO_LEN;
/* Set default number of RX and TX queues to use */
plat->tx_queues_to_use = 1;
plat->rx_queues_to_use = 1;
/* Disable Priority config by default */
plat->tx_queues_cfg[0].use_prio = false;
plat->rx_queues_cfg[0].use_prio = false;
/* Disable RX queues routing by default */
plat->rx_queues_cfg[0].pkt_route = 0x0;
}
static struct phylink_pcs *intel_mgbe_select_pcs(struct stmmac_priv *priv,
@@ -629,22 +609,12 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
for (i = 0; i < plat->rx_queues_to_use; i++) {
for (i = 0; i < plat->rx_queues_to_use; i++)
plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
plat->rx_queues_cfg[i].chan = i;
/* Disable Priority config by default */
plat->rx_queues_cfg[i].use_prio = false;
/* Disable RX queues routing by default */
plat->rx_queues_cfg[i].pkt_route = 0x0;
}
for (i = 0; i < plat->tx_queues_to_use; i++) {
plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
/* Disable Priority config by default */
plat->tx_queues_cfg[i].use_prio = false;
/* Default TX Q0 to use TSO and rest TXQ for TBS */
if (i > 0)
plat->tx_queues_cfg[i].tbs_en = 1;
@@ -706,15 +676,6 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
plat->ptp_clk_freq_config = intel_mgbe_ptp_clk_freq_config;
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/* Set the maxmtu to a default of JUMBO_LEN */
plat->maxmtu = JUMBO_LEN;
plat->flags |= STMMAC_FLAG_VLAN_FAIL_Q_EN;
/* Use the last Rx queue */
@@ -1286,7 +1247,7 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,
if (!intel_priv)
return -ENOMEM;
plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
plat = stmmac_plat_dat_alloc(&pdev->dev);
if (!plat)
return -ENOMEM;

22
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
View File

@@ -95,28 +95,12 @@ static void loongson_default_data(struct pci_dev *pdev,
plat->core_type = DWMAC_CORE_GMAC;
plat->force_sf_dma_mode = 1;
/* Set default value for multicast hash bins */
/* Increase the default value for multicast hash bins */
plat->multicast_filter_bins = 256;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/* Set the maxmtu to a default of JUMBO_LEN */
plat->maxmtu = JUMBO_LEN;
/* Disable Priority config by default */
plat->tx_queues_cfg[0].use_prio = false;
plat->rx_queues_cfg[0].use_prio = false;
/* Disable RX queues routing by default */
plat->rx_queues_cfg[0].pkt_route = 0x0;
plat->clk_ref_rate = 125000000;
plat->clk_ptp_rate = 125000000;
/* Default to phy auto-detection */
plat->phy_addr = -1;
plat->dma_cfg->pbl = 32;
plat->dma_cfg->pblx8 = true;
@@ -140,8 +124,6 @@ static void loongson_default_data(struct pci_dev *pdev,
break;
default:
ld->multichan = 0;
plat->tx_queues_to_use = 1;
plat->rx_queues_to_use = 1;
break;
}
}
@@ -559,7 +541,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
struct loongson_data *ld;
int ret;
plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
plat = stmmac_plat_dat_alloc(&pdev->dev);
if (!plat)
return -ENOMEM;

1
drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c
View File

@@ -24,7 +24,6 @@ static int sophgo_sg2044_dwmac_init(struct platform_device *pdev,
plat_dat->flags |= STMMAC_FLAG_SPH_DISABLE;
plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
plat_dat->multicast_filter_bins = 0;
plat_dat->unicast_filter_entries = 1;
return 0;
}

2
drivers/net/ethernet/stmicro/stmmac/stmmac.h
View File

@@ -408,6 +408,8 @@ int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,
phy_interface_t interface, int speed);
struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev);
static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv)
{
return !!priv->xdp_prog;

34
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@@ -7555,6 +7555,40 @@ static void stmmac_unregister_devlink(struct stmmac_priv *priv)
devlink_free(priv->devlink);
}
struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev)
{
struct plat_stmmacenet_data *plat_dat;
int i;
plat_dat = devm_kzalloc(dev, sizeof(*plat_dat), GFP_KERNEL);
if (!plat_dat)
return NULL;
/* Set the defaults:
* - phy autodetection
* - determine GMII_Address CR field from CSR clock
* - allow MTU up to JUMBO_LEN
* - hash table size
* - one unicast filter entry
*/
plat_dat->phy_addr = -1;
plat_dat->clk_csr = -1;
plat_dat->maxmtu = JUMBO_LEN;
plat_dat->multicast_filter_bins = HASH_TABLE_SIZE;
plat_dat->unicast_filter_entries = 1;
/* Set the mtl defaults */
plat_dat->tx_queues_to_use = 1;
plat_dat->rx_queues_to_use = 1;
/* Setup the default RX queue channel map */
for (i = 0; i < ARRAY_SIZE(plat_dat->rx_queues_cfg); i++)
plat_dat->rx_queues_cfg[i].chan = i;
return plat_dat;
}
EXPORT_SYMBOL_GPL(stmmac_plat_dat_alloc);
/**
* stmmac_dvr_probe
* @device: device pointer

39
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
View File

@@ -27,26 +27,6 @@ static void common_default_data(struct plat_stmmacenet_data *plat)
plat->force_sf_dma_mode = 1;
plat->mdio_bus_data->needs_reset = true;
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/* Set the maxmtu to a default of JUMBO_LEN */
plat->maxmtu = JUMBO_LEN;
/* Set default number of RX and TX queues to use */
plat->tx_queues_to_use = 1;
plat->rx_queues_to_use = 1;
/* Disable Priority config by default */
plat->tx_queues_cfg[0].use_prio = false;
plat->rx_queues_cfg[0].use_prio = false;
/* Disable RX queues routing by default */
plat->rx_queues_cfg[0].pkt_route = 0x0;
}
static int stmmac_default_data(struct pci_dev *pdev,
@@ -81,22 +61,12 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,
plat->flags |= STMMAC_FLAG_TSO_EN;
plat->pmt = 1;
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/* Set the maxmtu to a default of JUMBO_LEN */
plat->maxmtu = JUMBO_LEN;
/* Set default number of RX and TX queues to use */
plat->tx_queues_to_use = 4;
plat->rx_queues_to_use = 4;
plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
for (i = 0; i < plat->tx_queues_to_use; i++) {
plat->tx_queues_cfg[i].use_prio = false;
plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
plat->tx_queues_cfg[i].weight = 25;
if (i > 0)
@@ -104,15 +74,10 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,
}
plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
for (i = 0; i < plat->rx_queues_to_use; i++) {
plat->rx_queues_cfg[i].use_prio = false;
for (i = 0; i < plat->rx_queues_to_use; i++)
plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
plat->rx_queues_cfg[i].pkt_route = 0x0;
plat->rx_queues_cfg[i].chan = i;
}
plat->bus_id = 1;
plat->phy_addr = -1;
plat->phy_interface = PHY_INTERFACE_MODE_GMII;
plat->dma_cfg->pbl = 32;
@@ -191,7 +156,7 @@ static int stmmac_pci_probe(struct pci_dev *pdev,
int ret;
int i;
plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
plat = stmmac_plat_dat_alloc(&pdev->dev);
if (!plat)
return -ENOMEM;

60
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
View File

@@ -137,13 +137,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
u8 queue = 0;
int ret = 0;
/* For backwards-compatibility with device trees that don't have any
* snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
* to one RX and TX queues each.
*/
plat->rx_queues_to_use = 1;
plat->tx_queues_to_use = 1;
/* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
* to always set this, otherwise Queue will be classified as AVB
* (because MTL_QUEUE_AVB = 0).
@@ -162,9 +155,8 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
}
/* Processing RX queues common config */
if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
&plat->rx_queues_to_use))
plat->rx_queues_to_use = 1;
of_property_read_u32(rx_node, "snps,rx-queues-to-use",
&plat->rx_queues_to_use);
if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
@@ -185,18 +177,13 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
else
plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
&plat->rx_queues_cfg[queue].chan))
plat->rx_queues_cfg[queue].chan = queue;
of_property_read_u32(q_node, "snps,map-to-dma-channel",
&plat->rx_queues_cfg[queue].chan);
/* TODO: Dynamic mapping to be included in the future */
if (of_property_read_u32(q_node, "snps,priority",
&plat->rx_queues_cfg[queue].prio)) {
plat->rx_queues_cfg[queue].prio = 0;
plat->rx_queues_cfg[queue].use_prio = false;
} else {
if (!of_property_read_u32(q_node, "snps,priority",
&plat->rx_queues_cfg[queue].prio))
plat->rx_queues_cfg[queue].use_prio = true;
}
/* RX queue specific packet type routing */
if (of_property_read_bool(q_node, "snps,route-avcp"))
@@ -209,8 +196,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
else
plat->rx_queues_cfg[queue].pkt_route = 0x0;
queue++;
}
@@ -221,9 +206,8 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
}
/* Processing TX queues common config */
if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
&plat->tx_queues_to_use))
plat->tx_queues_to_use = 1;
of_property_read_u32(tx_node, "snps,tx-queues-to-use",
&plat->tx_queues_to_use);
if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
@@ -268,13 +252,9 @@ static int stmmac_mtl_setup(struct platform_device *pdev,
plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
}
if (of_property_read_u32(q_node, "snps,priority",
&plat->tx_queues_cfg[queue].prio)) {
plat->tx_queues_cfg[queue].prio = 0;
plat->tx_queues_cfg[queue].use_prio = false;
} else {
if (!of_property_read_u32(q_node, "snps,priority",
&plat->tx_queues_cfg[queue].prio))
plat->tx_queues_cfg[queue].use_prio = true;
}
plat->tx_queues_cfg[queue].coe_unsupported =
of_property_read_bool(q_node, "snps,coe-unsupported");
@@ -436,7 +416,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
void *ret;
int rc;
plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
plat = stmmac_plat_dat_alloc(&pdev->dev);
if (!plat)
return ERR_PTR(-ENOMEM);
@@ -480,13 +460,6 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
plat->bus_id = ++bus_id;
}
/* Default to phy auto-detection */
plat->phy_addr = -1;
/* Default to get clk_csr from stmmac_clk_csr_set(),
* or get clk_csr from device tree.
*/
plat->clk_csr = -1;
if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr))
of_property_read_u32(np, "clk_csr", &plat->clk_csr);
@@ -515,17 +488,6 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
plat->flags |= STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
}
/* Set the maxmtu to a default of JUMBO_LEN in case the
* parameter is not present in the device tree.
*/
plat->maxmtu = JUMBO_LEN;
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
/*
* Currently only the properties needed on SPEAr600
* are provided. All other properties should be added