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net: enetc: add ptp timer binding support for i.MX94
The i.MX94 has three PTP timers, and all standalone ENETCs can select one of them to bind to as their PHC. The 'ptp-timer' property is used to represent the PTP device of the Ethernet controller. So users can add 'ptp-timer' to the ENETC node to specify the PTP timer. The driver parses this property to bind the two hardware devices. If the "ptp-timer" property is not present, the first timer of the PCIe bus where the ENETC is located is used as the default bound PTP timer. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Wei Fang <wei.fang@nxp.com> Link: https://patch.msgid.link/20251029013900.407583-5-wei.fang@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
committed by
Jakub Kicinski
parent
ba5d7d45ce
commit
1cd3f21c18
@@ -66,6 +66,7 @@
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/* NETC integrated endpoint register block register */
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#define IERB_EMDIOFAUXR 0x344
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#define IERB_T0FAUXR 0x444
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#define IERB_ETBCR(a) (0x300c + 0x100 * (a))
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#define IERB_EFAUXR(a) (0x3044 + 0x100 * (a))
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#define IERB_VFAUXR(a) (0x4004 + 0x40 * (a))
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#define FAUXR_LDID GENMASK(3, 0)
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@@ -78,10 +79,16 @@
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#define IMX94_ENETC0_BUS_DEVFN 0x100
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#define IMX94_ENETC1_BUS_DEVFN 0x140
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#define IMX94_ENETC2_BUS_DEVFN 0x180
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#define IMX94_TIMER0_BUS_DEVFN 0x1
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#define IMX94_TIMER1_BUS_DEVFN 0x101
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#define IMX94_TIMER2_BUS_DEVFN 0x181
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#define IMX94_ENETC0_LINK 3
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#define IMX94_ENETC1_LINK 4
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#define IMX94_ENETC2_LINK 5
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#define NETC_ENETC_ID(a) (a)
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#define NETC_TIMER_ID(a) (a)
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/* Flags for different platforms */
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#define NETC_HAS_NETCMIX BIT(0)
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@@ -345,6 +352,98 @@ static int imx95_ierb_init(struct platform_device *pdev)
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return 0;
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}
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static int imx94_get_enetc_id(struct device_node *np)
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{
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int bus_devfn = netc_of_pci_get_bus_devfn(np);
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/* Parse ENETC offset */
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switch (bus_devfn) {
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case IMX94_ENETC0_BUS_DEVFN:
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return NETC_ENETC_ID(0);
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case IMX94_ENETC1_BUS_DEVFN:
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return NETC_ENETC_ID(1);
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case IMX94_ENETC2_BUS_DEVFN:
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return NETC_ENETC_ID(2);
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default:
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return -EINVAL;
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}
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}
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static int imx94_get_timer_id(struct device_node *np)
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{
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int bus_devfn = netc_of_pci_get_bus_devfn(np);
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/* Parse NETC PTP timer ID, the timer0 is on bus 0,
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* the timer 1 and timer2 is on bus 1.
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*/
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switch (bus_devfn) {
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case IMX94_TIMER0_BUS_DEVFN:
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return NETC_TIMER_ID(0);
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case IMX94_TIMER1_BUS_DEVFN:
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return NETC_TIMER_ID(1);
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case IMX94_TIMER2_BUS_DEVFN:
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return NETC_TIMER_ID(2);
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default:
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return -EINVAL;
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}
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}
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static int imx94_enetc_update_tid(struct netc_blk_ctrl *priv,
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struct device_node *np)
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{
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struct device *dev = &priv->pdev->dev;
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struct device_node *timer_np;
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int eid, tid;
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eid = imx94_get_enetc_id(np);
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if (eid < 0) {
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dev_err(dev, "Failed to get ENETC ID\n");
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return eid;
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}
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timer_np = of_parse_phandle(np, "ptp-timer", 0);
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if (!timer_np) {
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/* If 'ptp-timer' is not present, the timer1 is the default
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* timer of all standalone ENETCs, which is on the same PCIe
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* bus as these ENETCs.
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*/
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tid = NETC_TIMER_ID(1);
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goto end;
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}
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tid = imx94_get_timer_id(timer_np);
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of_node_put(timer_np);
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if (tid < 0) {
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dev_err(dev, "Failed to get NETC Timer ID\n");
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return tid;
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}
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end:
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netc_reg_write(priv->ierb, IERB_ETBCR(eid), tid);
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return 0;
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}
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static int imx94_ierb_init(struct platform_device *pdev)
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{
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struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);
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struct device_node *np = pdev->dev.of_node;
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int err;
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for_each_child_of_node_scoped(np, child) {
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for_each_child_of_node_scoped(child, gchild) {
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if (!of_device_is_compatible(gchild, "pci1131,e101"))
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continue;
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err = imx94_enetc_update_tid(priv, gchild);
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if (err)
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return err;
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}
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}
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return 0;
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}
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static int netc_ierb_init(struct platform_device *pdev)
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{
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struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);
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@@ -441,6 +540,7 @@ static const struct netc_devinfo imx95_devinfo = {
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static const struct netc_devinfo imx94_devinfo = {
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.flags = NETC_HAS_NETCMIX,
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.netcmix_init = imx94_netcmix_init,
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.ierb_init = imx94_ierb_init,
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};
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static const struct of_device_id netc_blk_ctrl_match[] = {
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