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drm/amd/display: Fix logical vs bitwise bug in get_embedded_panel_info_v2_1()
The .H_SYNC_POLARITY and .V_SYNC_POLARITY variables are 1 bit bitfields
of a u32. The ATOM_HSYNC_POLARITY define is 0x2 and the
ATOM_VSYNC_POLARITY is 0x4. When we do a bitwise negate of 0, 2, or 4
then the last bit is always 1 so this code always sets .H_SYNC_POLARITY
and .V_SYNC_POLARITY to true.
This code is instead intended to check if the ATOM_HSYNC_POLARITY or
ATOM_VSYNC_POLARITY flags are set and reverse the result. In other
words, it's supposed to be a logical negate instead of a bitwise negate.
Fixes: ae79c310b1 ("drm/amd/display: Add DCE12 bios parser support")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
621e55f191
commit
1a79482699
@@ -1480,10 +1480,10 @@ static enum bp_result get_embedded_panel_info_v2_1(
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/* not provided by VBIOS */
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info->lcd_timing.misc_info.HORIZONTAL_CUT_OFF = 0;
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info->lcd_timing.misc_info.H_SYNC_POLARITY = ~(uint32_t) (lvds->lcd_timing.miscinfo
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& ATOM_HSYNC_POLARITY);
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info->lcd_timing.misc_info.V_SYNC_POLARITY = ~(uint32_t) (lvds->lcd_timing.miscinfo
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& ATOM_VSYNC_POLARITY);
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info->lcd_timing.misc_info.H_SYNC_POLARITY = !(lvds->lcd_timing.miscinfo &
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ATOM_HSYNC_POLARITY);
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info->lcd_timing.misc_info.V_SYNC_POLARITY = !(lvds->lcd_timing.miscinfo &
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ATOM_VSYNC_POLARITY);
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/* not provided by VBIOS */
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info->lcd_timing.misc_info.VERTICAL_CUT_OFF = 0;
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