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drm/xe/vf: Start CTs before resfix VF post migration recovery

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Before RESFIX_DONE, all CTs stuck in the H2G queue need to be squashed,
as they may contain actions which contain invalid GGTT references or are
unnecessary after HW change.

Starting the CTs clears all H2Gs in the queue. Any lost H2Gs are
resubmitted by the GuC submission state machine.

v3:
 - Don't mess with head / tail values (Michal)
v4:
 - Don't mess with broke (Michal)
 - Add CTB_H2G_BUFFER_OFFSET (Michal)
v5:
 - Adjust commit message (Tomasz)

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://lore.kernel.org/r/20251008214532.3442967-25-matthew.brost@intel.com
This commit is contained in:
Matthew Brost
2025-10-08 14:45:22 -07:00
parent 4bdfb05305
commit 16b6dd1a90
3 changed files with 55 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/gpu/drm/xe/xe_gt_sriov_vf.c
View File

@@ -1134,6 +1134,11 @@ static int vf_post_migration_fixups(struct xe_gt *gt)
return 0;
}
static void vf_post_migration_rearm(struct xe_gt *gt)
{
xe_guc_ct_restart(&gt->uc.guc.ct);
}
static void vf_post_migration_kickstart(struct xe_gt *gt)
{
xe_guc_submit_unpause(&gt->uc.guc);
@@ -1185,6 +1190,8 @@ static void vf_post_migration_recovery(struct xe_gt *gt)
if (err)
goto fail;
vf_post_migration_rearm(gt);
err = vf_post_migration_notify_resfix_done(gt);
if (err && err != -EAGAIN)
goto fail;

60
drivers/gpu/drm/xe/xe_guc_ct.c
View File

@@ -502,7 +502,7 @@ static void ct_exit_safe_mode(struct xe_guc_ct *ct)
xe_gt_dbg(ct_to_gt(ct), "GuC CT safe-mode disabled\n");
}
int xe_guc_ct_enable(struct xe_guc_ct *ct)
static int __xe_guc_ct_start(struct xe_guc_ct *ct, bool needs_register)
{
struct xe_device *xe = ct_to_xe(ct);
struct xe_gt *gt = ct_to_gt(ct);
@@ -510,21 +510,29 @@ int xe_guc_ct_enable(struct xe_guc_ct *ct)
xe_gt_assert(gt, !xe_guc_ct_enabled(ct));
xe_map_memset(xe, &ct->bo->vmap, 0, 0, xe_bo_size(ct->bo));
guc_ct_ctb_h2g_init(xe, &ct->ctbs.h2g, &ct->bo->vmap);
guc_ct_ctb_g2h_init(xe, &ct->ctbs.g2h, &ct->bo->vmap);
if (needs_register) {
xe_map_memset(xe, &ct->bo->vmap, 0, 0, xe_bo_size(ct->bo));
guc_ct_ctb_h2g_init(xe, &ct->ctbs.h2g, &ct->bo->vmap);
guc_ct_ctb_g2h_init(xe, &ct->ctbs.g2h, &ct->bo->vmap);
err = guc_ct_ctb_h2g_register(ct);
if (err)
goto err_out;
err = guc_ct_ctb_h2g_register(ct);
if (err)
goto err_out;
err = guc_ct_ctb_g2h_register(ct);
if (err)
goto err_out;
err = guc_ct_ctb_g2h_register(ct);
if (err)
goto err_out;
err = guc_ct_control_toggle(ct, true);
if (err)
goto err_out;
err = guc_ct_control_toggle(ct, true);
if (err)
goto err_out;
} else {
ct->ctbs.h2g.info.broken = false;
ct->ctbs.g2h.info.broken = false;
/* Skip everything in H2G buffer */
xe_map_memset(xe, &ct->bo->vmap, CTB_H2G_BUFFER_OFFSET, 0,
CTB_H2G_BUFFER_SIZE);
}
guc_ct_change_state(ct, XE_GUC_CT_STATE_ENABLED);
@@ -556,6 +564,32 @@ err_out:
return err;
}
/**
* xe_guc_ct_restart() - Restart GuC CT
* @ct: the &xe_guc_ct
*
* Restart GuC CT to an empty state without issuing a CT register MMIO command.
*
* Return: 0 on success, or a negative errno on failure.
*/
int xe_guc_ct_restart(struct xe_guc_ct *ct)
{
return __xe_guc_ct_start(ct, false);
}
/**
* xe_guc_ct_enable() - Enable GuC CT
* @ct: the &xe_guc_ct
*
* Enable GuC CT to an empty state and issue a CT register MMIO command.
*
* Return: 0 on success, or a negative errno on failure.
*/
int xe_guc_ct_enable(struct xe_guc_ct *ct)
{
return __xe_guc_ct_start(ct, true);
}
static void stop_g2h_handler(struct xe_guc_ct *ct)
{
cancel_work_sync(&ct->g2h_worker);

1
drivers/gpu/drm/xe/xe_guc_ct.h
View File

@@ -15,6 +15,7 @@ int xe_guc_ct_init_noalloc(struct xe_guc_ct *ct);
int xe_guc_ct_init(struct xe_guc_ct *ct);
int xe_guc_ct_init_post_hwconfig(struct xe_guc_ct *ct);
int xe_guc_ct_enable(struct xe_guc_ct *ct);
int xe_guc_ct_restart(struct xe_guc_ct *ct);
void xe_guc_ct_disable(struct xe_guc_ct *ct);
void xe_guc_ct_stop(struct xe_guc_ct *ct);
void xe_guc_ct_flush_and_stop(struct xe_guc_ct *ct);