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spi: spi-mem: Add a new controller capability
There are spi devices with multiple frequency limitations depending on the invoked command. We probably do not want to afford running at the lowest supported frequency all the time, so if we want to get the most of our hardware, we need to allow per-operation frequency limitations. Among all the SPI memory controllers, I believe all are capable of changing the spi frequency on the fly. Some of the drivers do not make any frequency setup though. And some others will derive a per chip prescaler value which will be used forever. Actually changing the frequency on the fly is something new in Linux, so we need to carefully flag the drivers which do and do not support it. A controller capability is created for that, and the presence for this capability will always be checked before accepting such pattern. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-2-ad218dbc406f@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown
parent
0fefeade90
commit
1248c9b8d5
@@ -191,6 +191,12 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
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op->max_freq < mem->spi->controller->min_speed_hz)
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return false;
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if (op->max_freq &&
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op->max_freq < mem->spi->max_speed_hz) {
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if (!spi_mem_controller_is_capable(ctlr, per_op_freq))
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return false;
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}
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return spi_mem_check_buswidth(mem, op);
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}
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EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
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@@ -311,11 +311,13 @@ struct spi_controller_mem_ops {
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* @ecc: Supports operations with error correction
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* @swap16: Supports swapping bytes on a 16 bit boundary when configured in
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* Octal DTR
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* @per_op_freq: Supports per operation frequency switching
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*/
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struct spi_controller_mem_caps {
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bool dtr;
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bool ecc;
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bool swap16;
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bool per_op_freq;
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};
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#define spi_mem_controller_is_capable(ctlr, cap) \
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