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wifi: rtw89: Add rtw8852a_dle_mem_usb
Add rtw8852a_dle_mem_usb and its various quotas and sizes in struct rtw89_mac_size_set. "dle" could be "Data Link Engine" or "Double Link Engine". These are some parameters needed for RTL8852AU. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/d0a09039-97a8-4501-b023-510c126d8c61@gmail.com
This commit is contained in:
committed by
Ping-Ke Shih
parent
233542f5b4
commit
0eea5e0f03
@@ -1669,6 +1669,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
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/* PCIE 64 */
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.wde_size0 = {RTW89_WDE_PG_64, 4095, 1,},
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.wde_size0_v1 = {RTW89_WDE_PG_64, 3328, 0, 0,},
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/* 8852A USB */
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.wde_size1 = {RTW89_WDE_PG_64, 768, 0,},
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/* DLFW */
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.wde_size4 = {RTW89_WDE_PG_64, 0, 4096,},
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.wde_size4_v1 = {RTW89_WDE_PG_64, 0, 3328, 0,},
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@@ -1692,6 +1694,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
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/* PCIE */
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.ple_size0 = {RTW89_PLE_PG_128, 1520, 16,},
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.ple_size0_v1 = {RTW89_PLE_PG_128, 2688, 240, 212992,},
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/* 8852A USB */
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.ple_size1 = {RTW89_PLE_PG_128, 3184, 16,},
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.ple_size3_v1 = {RTW89_PLE_PG_128, 2928, 0, 212992,},
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/* DLFW */
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.ple_size4 = {RTW89_PLE_PG_128, 64, 1472,},
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@@ -1715,6 +1719,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
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/* PCIE 64 */
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.wde_qt0 = {3792, 196, 0, 107,},
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.wde_qt0_v1 = {3302, 6, 0, 20,},
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/* 8852A USB */
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.wde_qt1 = {512, 196, 0, 60,},
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/* DLFW */
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.wde_qt4 = {0, 0, 0, 0,},
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/* PCIE 64 */
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@@ -1743,6 +1749,9 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
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.ple_qt13 = {0, 0, 16, 48, 0, 0, 0, 0, 0, 0, 0,},
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/* PCIE 64 */
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.ple_qt18 = {147, 0, 16, 20, 17, 13, 89, 0, 32, 14, 8, 0,},
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/* 8852A USB SCC */
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.ple_qt25 = {1536, 0, 16, 48, 13, 13, 360, 0, 32, 40, 8, 0,},
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.ple_qt26 = {2654, 0, 1134, 48, 64, 13, 1478, 0, 64, 128, 120, 0,},
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/* USB 52C USB3.0 */
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.ple_qt42 = {1068, 0, 16, 48, 4, 13, 178, 0, 16, 1, 8, 16, 0,},
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/* USB 52C USB3.0 */
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@@ -924,6 +924,7 @@ struct rtw89_mac_size_set {
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const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c0;
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const struct rtw89_hfc_prec_cfg hfc_prec_cfg_c2;
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const struct rtw89_dle_size wde_size0;
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const struct rtw89_dle_size wde_size1;
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const struct rtw89_dle_size wde_size0_v1;
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const struct rtw89_dle_size wde_size4;
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const struct rtw89_dle_size wde_size4_v1;
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@@ -937,6 +938,7 @@ struct rtw89_mac_size_set {
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const struct rtw89_dle_size wde_size25;
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const struct rtw89_dle_size wde_size31;
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const struct rtw89_dle_size ple_size0;
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const struct rtw89_dle_size ple_size1;
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const struct rtw89_dle_size ple_size0_v1;
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const struct rtw89_dle_size ple_size3_v1;
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const struct rtw89_dle_size ple_size4;
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@@ -950,6 +952,7 @@ struct rtw89_mac_size_set {
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const struct rtw89_dle_size ple_size33;
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const struct rtw89_dle_size ple_size34;
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const struct rtw89_wde_quota wde_qt0;
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const struct rtw89_wde_quota wde_qt1;
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const struct rtw89_wde_quota wde_qt0_v1;
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const struct rtw89_wde_quota wde_qt4;
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const struct rtw89_wde_quota wde_qt6;
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@@ -967,6 +970,8 @@ struct rtw89_mac_size_set {
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const struct rtw89_ple_quota ple_qt9;
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const struct rtw89_ple_quota ple_qt13;
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const struct rtw89_ple_quota ple_qt18;
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const struct rtw89_ple_quota ple_qt25;
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const struct rtw89_ple_quota ple_qt26;
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const struct rtw89_ple_quota ple_qt42;
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const struct rtw89_ple_quota ple_qt43;
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const struct rtw89_ple_quota ple_qt44;
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@@ -65,6 +65,19 @@ static const struct rtw89_dle_mem rtw8852a_dle_mem_pcie[] = {
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NULL},
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};
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static const struct rtw89_dle_mem rtw8852a_dle_mem_usb[] = {
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[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size1,
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&rtw89_mac_size.ple_size1, &rtw89_mac_size.wde_qt1,
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&rtw89_mac_size.wde_qt1, &rtw89_mac_size.ple_qt25,
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&rtw89_mac_size.ple_qt26},
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[RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size4,
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&rtw89_mac_size.ple_size4, &rtw89_mac_size.wde_qt4,
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&rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13,
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&rtw89_mac_size.ple_qt13},
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[RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
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NULL},
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};
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static const struct rtw89_reg2_def rtw8852a_pmac_ht20_mcs7_tbl[] = {
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{0x44AC, 0x00000000},
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{0x44B0, 0x00000000},
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@@ -2225,7 +2238,10 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
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.dis_2g_40m_ul_ofdma = true,
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.rsvd_ple_ofst = 0x6f800,
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.hfc_param_ini = {rtw8852a_hfc_param_ini_pcie, NULL, NULL},
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.dle_mem = {rtw8852a_dle_mem_pcie, NULL, NULL, NULL},
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.dle_mem = {rtw8852a_dle_mem_pcie,
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rtw8852a_dle_mem_usb,
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rtw8852a_dle_mem_usb,
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NULL},
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.wde_qempty_acq_grpnum = 16,
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.wde_qempty_mgq_grpsel = 16,
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.rf_base_addr = {0xc000, 0xd000},
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