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arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"

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The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring (Arm)
2025-06-09 16:57:06 -05:00
committed by Arnd Bergmann
parent f060fee24a
commit 0d495db1b9
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
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@@ -136,8 +136,8 @@
reg = <0x04 0x02020000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk125mhz>;
clock-names = "apb_pclk";
clocks = <&clk125mhz>, <&clk125mhz>;
clock-names = "uartclk", "apb_pclk";
};
};