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a3e32b41c2
Renesas created different watchdog IPs but they are all handled in the same binding documentation. This leads to a lot of conditional handling which makes it unnecessarily hard to add new items. Factor out the RZ/N1 watchdog to make handling easier. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
51 lines
1.0 KiB
YAML
51 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/renesas,rzn1-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/N1 Watchdog Timer (WDT) Controller
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maintainers:
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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properties:
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compatible:
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items:
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- const: renesas,r9a06g032-wdt # RZ/N1D
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- const: renesas,rzn1-wdt # RZ/N1
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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timeout-sec: true
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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allOf:
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- $ref: watchdog.yaml#
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r9a06g032-sysctrl.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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watchdog@40008000 {
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compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
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reg = <0x40008000 0x1000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
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};
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