mirror of
https://github.com/torvalds/linux.git
synced 2025-12-07 20:06:24 +00:00
Renesas created different watchdog IPs but they are all handled in the same binding documentation. This leads to a lot of conditional handling which makes it unnecessarily hard to add new items. Factor out the RZ/G2L watchdog to make handling easier. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
112 lines
2.4 KiB
YAML
112 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/watchdog/renesas,rzg2l-wdt.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Renesas RZ/G2L Watchdog Timer (WDT) Controller
|
|
|
|
maintainers:
|
|
- Biju Das <biju.das.jz@bp.renesas.com>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- items:
|
|
- enum:
|
|
- renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five
|
|
- renesas,r9a07g044-wdt # RZ/G2{L,LC}
|
|
- renesas,r9a07g054-wdt # RZ/V2L
|
|
- renesas,r9a08g045-wdt # RZ/G3S
|
|
- const: renesas,rzg2l-wdt
|
|
|
|
- items:
|
|
- const: renesas,r9a09g011-wdt # RZ/V2M
|
|
- const: renesas,rzv2m-wdt # RZ/V2M
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
minItems: 1
|
|
items:
|
|
- description: Timeout
|
|
- description: Parity error
|
|
|
|
interrupt-names:
|
|
minItems: 1
|
|
items:
|
|
- const: wdt
|
|
- const: perrout
|
|
|
|
clocks:
|
|
items:
|
|
- description: Register access clock
|
|
- description: Main clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: pclk
|
|
- const: oscclk
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
timeout-sec: true
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- power-domains
|
|
- resets
|
|
|
|
allOf:
|
|
- $ref: watchdog.yaml#
|
|
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
const: renesas,rzg2l-wdt
|
|
then:
|
|
properties:
|
|
interrupts:
|
|
minItems: 2
|
|
interrupt-names:
|
|
minItems: 2
|
|
required:
|
|
- interrupt-names
|
|
else:
|
|
properties:
|
|
interrupts:
|
|
maxItems: 1
|
|
interrupt-names:
|
|
maxItems: 1
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/r9a07g044-cpg.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
watchdog@12800800 {
|
|
compatible = "renesas,r9a07g044-wdt",
|
|
"renesas,rzg2l-wdt";
|
|
reg = <0x12800800 0x400>;
|
|
clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
|
|
<&cpg CPG_MOD R9A07G044_WDT0_CLK>;
|
|
clock-names = "pclk", "oscclk";
|
|
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "wdt", "perrout";
|
|
resets = <&cpg R9A07G044_WDT0_PRESETN>;
|
|
power-domains = <&cpg>;
|
|
};
|