AngeloGioacchino Del Regno 332d6084d4 drm/msm/dsi: Add configuration for 28nm PLL on family B ...

The 28nm PLL has a different iospace on MSM/APQ family B SoCs:
add a new configuration and use it when the DT reports the
"qcom,dsi-phy-28nm-hpm-fam-b" compatible.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>

2019-11-04 13:17:42 -08:00

..

dsi_phy_10nm.c

drm/msm/dsi: Add parentheses to quirks check in dsi_phy_hw_v3_0_lane_settings

2019-06-19 12:30:55 -07:00

dsi_phy_14nm.c

drm/msm: drop use of drmP.h

2019-09-03 16:16:57 -07:00

dsi_phy_20nm.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284

2019-06-05 17:36:37 +02:00

dsi_phy_28nm_8960.c

drm/msm: drop use of drmP.h

2019-09-03 16:16:57 -07:00

dsi_phy_28nm.c

drm/msm/dsi: Add configuration for 28nm PLL on family B

2019-11-04 13:17:42 -08:00

dsi_phy.c

drm/msm/dsi: Add configuration for 28nm PLL on family B

2019-11-04 13:17:42 -08:00

dsi_phy.h

drm/msm/dsi: Add configuration for 28nm PLL on family B

2019-11-04 13:17:42 -08:00