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843bce0fd1
Shreeya no longer works at Collabora, set Dmitry as maintainer of the Synopsys HDMI RX binding. Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
133 lines
3.4 KiB
YAML
133 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Device Tree bindings for Synopsys DesignWare HDMI RX Controller
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---
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$id: http://devicetree.org/schemas/media/snps,dw-hdmi-rx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare HDMI RX Controller
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maintainers:
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- Dmitry Osipenko <dmitry.osipenko@collabora.com>
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description:
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Synopsys DesignWare HDMI Input Controller preset on RK3588 SoCs
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allowing devices to receive and decode high-resolution video streams
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from external sources like media players, cameras, laptops, etc.
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properties:
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compatible:
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items:
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- const: rockchip,rk3588-hdmirx-ctrler
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- const: snps,dw-hdmi-rx
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reg:
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maxItems: 1
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: cec
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- const: hdmi
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- const: dma
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clocks:
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maxItems: 7
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clock-names:
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items:
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- const: aclk
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- const: audio
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- const: cr_para
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- const: pclk
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- const: ref
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- const: hclk_s_hdmirx
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- const: hclk_vo1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 4
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reset-names:
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items:
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- const: axi
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- const: apb
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- const: ref
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- const: biu
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memory-region:
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maxItems: 1
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hpd-gpios:
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description: GPIO specifier for HPD.
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maxItems: 1
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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The phandle of the syscon node for the general register file
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containing HDMIRX PHY status bits.
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rockchip,vo1-grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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The phandle of the syscon node for the Video Output GRF register
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to enable EDID transfer through SDAIN and SCLIN.
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- pinctrl-0
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- hpd-gpios
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rockchip,rk3588-cru.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/rk3588-power.h>
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#include <dt-bindings/reset/rockchip,rk3588-cru.h>
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hdmi_receiver: hdmi-receiver@fdee0000 {
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compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";
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reg = <0xfdee0000 0x6000>;
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interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "cec", "hdmi", "dma";
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clocks = <&cru ACLK_HDMIRX>,
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<&cru CLK_HDMIRX_AUD>,
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<&cru CLK_CR_PARA>,
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<&cru PCLK_HDMIRX>,
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<&cru CLK_HDMIRX_REF>,
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<&cru PCLK_S_HDMIRX>,
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<&cru HCLK_VO1>;
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clock-names = "aclk",
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"audio",
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"cr_para",
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"pclk",
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"ref",
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"hclk_s_hdmirx",
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"hclk_vo1";
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power-domains = <&power RK3588_PD_VO1>;
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resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>,
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<&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>;
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reset-names = "axi", "apb", "ref", "biu";
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memory-region = <&hdmi_receiver_cma>;
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pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_5v_detection>;
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pinctrl-names = "default";
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hpd-gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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};
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