Files
linux/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml
Daniel Scally ef5a75b444 dt-bindings: media: Add bindings for the RZ/V2H(P) IVC block
The RZ/V2H(P) SoC has a block called the Input Video Control block which
feeds image data into the Image Signal Processor. Add dt bindings to
describe the IVC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Daniel Scally <dan.scally@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2025-11-14 15:48:49 +01:00

104 lines
2.1 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/renesas,r9a09g057-ivc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/V2H(P) Input Video Control Block
maintainers:
- Daniel Scally <dan.scally@ideasonboard.com>
description:
The IVC block is a module that takes video frames from memory and feeds them
to the Image Signal Processor for processing.
properties:
compatible:
const: renesas,r9a09g057-ivc # RZ/V2H(P)
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Input Video Control block register access clock
- description: Video input data AXI bus clock
- description: ISP system clock
clock-names:
items:
- const: reg
- const: axi
- const: isp
power-domains:
maxItems: 1
resets:
items:
- description: Input Video Control block register access reset
- description: Video input data AXI bus reset
- description: ISP core reset
reset-names:
items:
- const: reg
- const: axi
- const: isp
port:
$ref: /schemas/graph.yaml#/properties/port
description: Output parallel video bus
properties:
endpoint:
$ref: /schemas/graph.yaml#/properties/endpoint
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- power-domains
- resets
- reset-names
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
isp-input@16040000 {
compatible = "renesas,r9a09g057-ivc";
reg = <0x16040000 0x230>;
clocks = <&cpg CPG_MOD 0xe3>,
<&cpg CPG_MOD 0xe4>,
<&cpg CPG_MOD 0xe5>;
clock-names = "reg", "axi", "isp";
power-domains = <&cpg>;
resets = <&cpg 0xd4>,
<&cpg 0xd1>,
<&cpg 0xd3>;
reset-names = "reg", "axi", "isp";
interrupts = <GIC_SPI 861 IRQ_TYPE_EDGE_RISING>;
port {
ivc_out: endpoint {
remote-endpoint = <&isp_in>;
};
};
};
...