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Rob Herring (Arm) e3e4e77140 dt-bindings: memory-controllers: fsl,imx-weim: Fix "fsl,weim-cs-timing" schema

The "fsl,weim-cs-timing" property is an array, but the constraints in
the if/then schema are for a matrix. That worked fine when all
properties were decoded into a matrix, but now dtschema decodes
properties into scalars and arrays based on their type.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20240807225959.3343093-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

2024-08-08 11:49:37 +02:00

fsl,ddr.yaml

powerpc/85xx: Remove fsl,85... bindings

2022-04-05 22:03:02 +02:00

fsl,ifc.yaml

dt-bindings: memory: fsl: replace maintainer

2024-06-17 08:07:35 +02:00

fsl,imx-weim-peripherals.yaml

dt-bindings: bus: imx-weim: convert to YAML

2024-02-26 08:25:59 +01:00

fsl,imx-weim.yaml

dt-bindings: memory-controllers: fsl,imx-weim: Fix "fsl,weim-cs-timing" schema