Atish Patra d53b0244c8 dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC ...

Add YAML DT binding documentation for the Microchip PolarFire SoC.
It is documented at:

https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

2021-04-26 08:31:30 -07:00

..

canaan.yaml

dt-bindings: add Canaan boards compatible strings

2021-02-22 17:51:06 -08:00

cpus.yaml

dt-bindings: update risc-v cpu properties

2021-02-22 17:51:07 -08:00

microchip.yaml

dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC

2021-04-26 08:31:30 -07:00

sifive-l2-cache.yaml

Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

2021-02-26 10:28:35 -08:00

sifive.yaml

dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board

2021-01-07 17:37:41 -08:00