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Convert VSC8531 Gigabit ethernet phy binding to DT schema format. While at it add compatible string for VSC8541 PHY which is very much similar to the VSC8531 PHY and is already supported in the kernel. VSC8541 PHY is present on the Renesas RZ/T2H EVK. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251025064850.393797-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
132 lines
3.9 KiB
YAML
132 lines
3.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/mscc-phy-vsc8531.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microsemi VSC8531 Gigabit Ethernet PHY
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maintainers:
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- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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description:
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The VSC8531 is a Gigabit Ethernet PHY with configurable MAC interface
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drive strength and LED modes.
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allOf:
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- $ref: ethernet-phy.yaml#
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select:
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properties:
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compatible:
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contains:
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enum:
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- ethernet-phy-id0007.0570 # VSC8531
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- ethernet-phy-id0007.0772 # VSC8541
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required:
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- compatible
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properties:
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compatible:
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items:
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- enum:
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- ethernet-phy-id0007.0570 # VSC8531
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- ethernet-phy-id0007.0772 # VSC8541
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- const: ethernet-phy-ieee802.3-c22
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vsc8531,vddmac:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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The VDDMAC voltage in millivolts. This property is used in combination
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with the edge-slowdown property to control the drive strength of the
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MAC interface output signals.
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enum: [3300, 2500, 1800, 1500]
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default: 3300
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vsc8531,edge-slowdown:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: >
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Percentage by which the edge rate should be slowed down relative to
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the fastest possible edge time. This setting helps reduce electromagnetic
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interference (EMI) by adjusting the drive strength of the MAC interface
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output signals. Valid values depend on the vddmac voltage setting
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according to the edge rate change table in the datasheet.
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- When vsc8531,vddmac = 3300 mV: allowed values are 0, 2, 4, 7, 10, 17, 29, and 53.
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(Recommended: 7)
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- When vsc8531,vddmac = 2500 mV: allowed values are 0, 3, 6, 10, 14, 23, 37, and 63.
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(Recommended: 10)
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- When vsc8531,vddmac = 1800 mV: allowed values are 0, 5, 9, 16, 23, 35, 52, and 76.
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(Recommended: 0)
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- When vsc8531,vddmac = 1500 mV: allowed values are 0, 6, 14, 21, 29, 42, 58, and 77.
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(Recommended: 0)
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enum: [0, 2, 3, 4, 5, 6, 7, 9, 10, 14, 16, 17, 21, 23, 29, 35, 37, 42, 52, 53, 58, 63, 76, 77]
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default: 0
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vsc8531,led-0-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: LED[0] behavior mode. See include/dt-bindings/net/mscc-phy-vsc8531.h
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for available modes.
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minimum: 0
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maximum: 15
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default: 1
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vsc8531,led-1-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: LED[1] behavior mode. See include/dt-bindings/net/mscc-phy-vsc8531.h
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for available modes.
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minimum: 0
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maximum: 15
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default: 2
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vsc8531,led-2-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: LED[2] behavior mode. See include/dt-bindings/net/mscc-phy-vsc8531.h
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for available modes.
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minimum: 0
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maximum: 15
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default: 0
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vsc8531,led-3-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: LED[3] behavior mode. See include/dt-bindings/net/mscc-phy-vsc8531.h
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for available modes.
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minimum: 0
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maximum: 15
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default: 8
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load-save-gpios:
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description: GPIO phandle used for the load/save operation of the PTP hardware
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clock (PHC).
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maxItems: 1
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dependencies:
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vsc8531,edge-slowdown:
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- vsc8531,vddmac
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/mscc-phy-vsc8531.h>
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@0 {
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compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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vsc8531,vddmac = <3300>;
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vsc8531,edge-slowdown = <7>;
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vsc8531,led-0-mode = <VSC8531_LINK_1000_ACTIVITY>;
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vsc8531,led-1-mode = <VSC8531_LINK_100_ACTIVITY>;
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load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
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};
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};
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