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31848987f1
Pull sophgo SoC devicetree updates from Arnd Bergmann: "The Sophgo SG2044 SoC is their second generation server chip with 64 cores, following the SG2042. In addition, there are minor updates for the cv180x SoCs" * tag 'soc-newsoc-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10 dt-bindings: riscv: sophgo: Add SG2044 compatible string dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt number riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi riscv: dts: sophgo: Move riscv cpu definition to a separate file riscv: dts: sophgo: Move all soc specific device into soc dtsi file riscv: sophgo: dts: Add spi controller for SG2042 riscv: dts: sophgo: sg2042: add pinctrl support